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2024-10-12 - 17:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Sat Oct 12, 2024 00:43:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1027221570,4sleep72126199cyclictest21:38:0813
204992121104,13sleep20-21swapper/219:11:008
207132117103,8sleep110-21swapper/1119:13:493
2582921140,1sleep70-21swapper/723:11:4513
2402121130,7sleep02125299cyclictest23:15:070
20623211394,15sleep150-21swapper/1519:12:337
20708211293,14sleep60-21swapper/619:13:4412
790821110,1sleep00-21swapper/022:51:190
20639210790,12sleep140-21swapper/1419:12:486
20819210690,11sleep90-21swapper/919:14:3615
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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