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2022-01-23 - 09:50

Intel(R) Xeon(R) CPU E5620 @ 2.40GHz, Linux 4.19.127-rt55 (Profile)

Latency plot of system in rack #c, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Up99 -i200 -h400 --smi -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Sun Jan 23, 2022 00:43:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
135922129104,20sleep110-21swapper/1119:10:353
3139321270,0sleep00-21swapper/022:49:100
3063221250,6sleep41518799cyclictest21:54:0710
145052122104,14sleep90-21swapper/919:12:4215
1651821150,3sleep51518899cyclictest21:18:1811
2186121140,1sleep00-21swapper/000:05:560
14590211491,19sleep00-21swapper/019:13:530
14550211293,14sleep140-21swapper/1419:13:196
722021100,1sleep90-21swapper/921:36:0115
1678621100,1sleep151520299cyclictest21:29:267
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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