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2024-04-18 - 09:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Thu Apr 18, 2024 00:43:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
684421770,5sleep52236499cyclictest22:34:2711
301921740,2sleep12236099cyclictest23:27:361
436421720,7sleep82237099cyclictest22:58:5014
215752137102,28sleep90-21swapper/919:08:0515
217452133118,11sleep10-21swapper/119:10:211
1881921310,7sleep132237699cyclictest22:11:185
2613321300,5sleep102237399cyclictest00:03:512
216232123103,14sleep100-21swapper/1019:08:382
216822119102,6sleep120-21swapper/1219:09:284
2554921170,0sleep00-21swapper/023:09:400
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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