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2024-07-13 - 20:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Sat Jul 13, 2024 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
276321680,5sleep73269399cyclictest21:50:1413
147021550,1sleep11509-21systemd-journal00:09:233
895421390,0sleep30-21swapper/322:48:459
320102134104,26sleep110-21swapper/1119:10:413
287952131104,22sleep80-21swapper/819:08:2914
32139212692,29sleep90-21swapper/919:12:3115
320912121102,15sleep20-21swapper/219:11:528
321022117102,10sleep130-21swapper/1319:12:035
3229321160,2sleep93269699cyclictest23:45:4915
3229321160,2sleep93269699cyclictest23:45:4915
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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