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2025-01-14 - 06:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Tue Jan 14, 2025 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2733021850,5sleep02290699cyclictest00:20:000
222852136120,12sleep50-21swapper/519:13:5411
801221240,1sleep100-21swapper/1022:32:072
1919421160,26sleep12291099cyclictest21:20:341
1919421160,26sleep12291099cyclictest21:20:341
214032115102,8sleep130-21swapper/1319:11:545
21441211490,19sleep40-21swapper/419:12:0110
22461211191,15sleep00-21swapper/019:15:410
197821100,2sleep666-21ksoftirqd/622:20:1712
22220210483,16sleep20-21swapper/219:13:038
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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