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2022-05-28 - 15:42

x86 Intel Xeon E5620 @2400 MHz, Linux 4.19.127-rt55 (Profile)

Latency plot of system in rack #c, slot #0
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Up99 -i200 -h400 --smi -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot0.osadl.org (updated Sat May 28, 2022 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2778821400,0sleep30-21swapper/321:42:299
2778821400,0sleep30-21swapper/321:42:299
17202140117,18sleep130-21swapper/1319:12:385
17202140117,18sleep130-21swapper/1319:12:385
17672121103,13sleep50-21swapper/519:13:1911
17672121103,13sleep50-21swapper/519:13:1911
18012117104,8sleep30-21swapper/319:13:339
18012117104,8sleep30-21swapper/319:13:339
1328521140,1sleep70-21swapper/700:20:0613
1745211294,13sleep00-21swapper/019:12:570
1745211294,13sleep00-21swapper/019:12:570
2031211090,13sleep100-21swapper/1019:16:042
2031211090,13sleep100-21swapper/1019:16:042
1739210990,14sleep110-21swapper/1119:12:523
1739210990,14sleep110-21swapper/1119:12:523
1020210992,12sleep60-21swapper/619:12:1512
1020210992,12sleep60-21swapper/619:12:1512
2578521080,0sleep140-21swapper/1423:18:426
1874210792,10sleep10-21swapper/119:14:351
1874210792,10sleep10-21swapper/119:14:351
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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