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2025-07-03 - 05:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Thu Jul 03, 2025 00:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
36229622277192,27sleep00-21swapper/019:05:040
36243402268193,43sleep10-21swapper/119:05:561
362483799124118,4cyclictest3747745-21kworker/u8:323:02:520
37364332930,3sleep00-21swapper/022:34:190
125899610,4rtkit-daemon1257-21rtkit-daemon22:02:350
362483799543,8cyclictest3703392-21apt-get21:50:150
125899530,4rtkit-daemon1257-21rtkit-daemon23:11:591
362483799523,6cyclictest3820503-21apt-get00:30:160
362483799521,11cyclictest3826028-21ssh00:36:280
125899520,4rtkit-daemon1257-21rtkit-daemon21:26:311
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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