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2025-07-01 - 04:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot4.osadl.org (updated Tue Jul 01, 2025 00:44:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13052202266190,61sleep00-21swapper/019:08:550
13049292265194,27sleep10-21swapper/119:05:471
13406082720,4chrt0-21swapper/020:35:230
14391142610,3sleep0161rcuc/023:05:550
125899580,4rtkit-daemon1257-21rtkit-daemon20:18:261
14013832480,3sleep10-21swapper/122:14:311
125899480,4rtkit-daemon0-21swapper/120:23:281
125899480,3rtkit-daemon0-21swapper/100:22:561
125899470,3rtkit-daemon0-21swapper/121:14:581
125899460,3rtkit-daemon0-21swapper/120:26:331
125899450,3rtkit-daemon0-21swapper/123:29:301
125899450,3rtkit-daemon0-21swapper/122:28:301
125899440,9rtkit-daemon0-21swapper/123:04:441
125899440,3rtkit-daemon0-21swapper/122:40:241
125899440,3rtkit-daemon0-21swapper/122:21:291
125899440,3rtkit-daemon0-21swapper/122:21:291
125899440,3rtkit-daemon0-21swapper/121:05:331
125899430,3rtkit-daemon0-21swapper/121:15:101
125899420,3rtkit-daemon0-21swapper/123:42:231
125899420,3rtkit-daemon0-21swapper/100:15:261
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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