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2023-09-25 - 13:15

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #c, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackcslot5s.osadl.org (updated Mon Sep 25, 2023 00:43:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
11025210989,2sleep10-21swapper/119:05:211
1049429983,2sleep00-21swapper/019:05:160
1234199430,38cyclictest31343-21meminfo19:55:201
1234199420,41cyclictest15788-21meminfo22:00:241
1234099420,41cyclictest5930-21meminfo21:35:240
1234199410,40cyclictest6109-21meminfo00:20:231
1234199380,37cyclictest22756-21meminfo23:40:211
1234199370,36cyclictest7003-21meminfo23:00:201
1234199370,36cyclictest4864-21meminfo20:10:241
1234199360,35cyclictest18650-21meminfo20:45:231
1234099360,35cyclictest23663-21meminfo22:20:260
1234199330,32cyclictest24722-21meminfo23:45:241
1234199330,32cyclictest20772-21meminfo23:35:201
1234099330,32cyclictest32438-21meminfo21:20:270
1234199320,31cyclictest26682-21meminfo23:50:231
1234099320,31cyclictest30638-21meminfo00:00:290
1234199310,30cyclictest8973-21meminfo23:05:241
1234099310,30cyclictest28487-21meminfo21:10:250
1234099310,30cyclictest26522-21meminfo21:05:250
1234099310,30cyclictest16688-21meminfo20:40:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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