You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2024-02-25 - 09:24
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot2.osadl.org (updated Sun Feb 25, 2024 00:46:28)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1235911120,5ptp4l401ktimersoftd/319:06:003
1527521000,6sleep233-21ksoftirqd/219:05:232
57698960,16rtkit-daemon0-21swapper/019:07:430
123591740,2ptp4l22465-21awk22:45:393
218662700,2sleep10-21swapper/123:55:341
227442670,3sleep30-21swapper/323:55:473
176992620,5sleep09-21ksoftirqd/021:30:000
176992620,5sleep09-21ksoftirqd/021:30:000
123591610,1ptp4l401ktimersoftd/321:05:363
123591610,1ptp4l401ktimersoftd/319:29:223
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional