You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-16 - 13:17
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot2.osadl.org (updated Sat May 16, 2026 00:45:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
277392205170,23sleep20-21swapper/219:06:342
277152205171,22sleep30-21swapper/319:06:153
277072205172,22sleep00-21swapper/019:06:090
278622203169,23sleep10-21swapper/119:08:101
1392911000,1ptp4l20767-21timerwakeupswit21:05:253
1395916244,10phc2sys0-21swapper/319:10:013
1395916244,10phc2sys0-21swapper/319:10:013
139291620,1ptp4l401ktimersoftd/319:30:153
2845899520,50cyclictest0-21swapper/120:28:451
102552510,2sleep00-21swapper/019:35:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional