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2024-07-27 - 03:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot2.osadl.org (updated Fri Jul 26, 2024 12:46:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2528123170,9sleep225282-21cpuspeed_turbos07:05:142
2663123000,4sleep10-21swapper/107:05:341
1235911810,6ptp4l401ktimersoftd/307:08:493
27518997535,8cyclictest41-21ksoftirqd/308:20:153
27518997533,9cyclictest41-21ksoftirqd/310:55:163
27518997132,11cyclictest41-21ksoftirqd/312:10:313
269102716,10sleep00-21swapper/007:07:370
27518997037,8cyclictest41-21ksoftirqd/310:25:273
27518997034,10cyclictest41-21ksoftirqd/311:25:173
2751899697,9cyclictest41-21ksoftirqd/309:40:013
27518996933,10cyclictest41-21ksoftirqd/308:25:423
27518996835,7cyclictest41-21ksoftirqd/311:20:213
27518996833,8cyclictest41-21ksoftirqd/311:09:463
27518996832,8cyclictest41-21ksoftirqd/308:31:173
2751899677,4cyclictest18427-21apt-get09:10:003
2751899667,11cyclictest41-21ksoftirqd/310:45:243
27518996632,10cyclictest41-21ksoftirqd/312:37:343
27518996629,9cyclictest41-21ksoftirqd/311:30:093
194152660,2sleep00-21swapper/011:30:120
2751899657,9cyclictest41-21ksoftirqd/309:40:313
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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