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2025-01-20 - 21:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot2.osadl.org (updated Mon Jan 20, 2025 12:45:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
74712206174,21sleep10-21swapper/107:07:531
137391206170,24phc2sys0-21swapper/307:07:343
72172205172,22sleep20-21swapper/207:05:292
73582202168,23sleep00-21swapper/007:06:230
775121700,2sleep2793699cyclictest12:20:242
76432150124,15sleep00-21swapper/007:10:010
137291950,1ptp4l12409-21apt-get08:30:153
82912690,4sleep28295-21cpuspeed_turbos09:40:132
139502690,2sleep10-21swapper/109:55:171
793599638,21cyclictest13569-21awk08:30:251
793599600,4cyclictest18018-21taskset10:04:511
137291560,1ptp4l401ktimersoftd/310:26:533
137291560,1ptp4l401ktimersoftd/310:26:533
793499483,6cyclictest101ktimersoftd/009:40:160
793499480,45cyclictest101ktimersoftd/008:40:180
793499472,6cyclictest6498-21sed09:35:170
793499462,6cyclictest9-21ksoftirqd/009:00:230
793499461,6cyclictest18660-21latency_hist10:09:590
7937994518,7cyclictest41-21ksoftirqd/307:20:013
7937994416,4cyclictest41-21ksoftirqd/308:00:273
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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