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2024-12-11 - 13:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot4.osadl.org (updated Wed Dec 11, 2024 00:45:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
134791205161,33phc2sys0-21swapper/319:09:383
87342202169,22sleep10-21swapper/119:05:391
88832201168,22sleep00-21swapper/019:07:350
87352200167,22sleep20-21swapper/219:05:402
193302770,1sleep20-21swapper/220:35:142
300422570,2sleep00-21swapper/019:50:190
134991560,1ptp4l401ktimersoftd/319:55:273
134991550,1ptp4l401ktimersoftd/300:22:153
119152540,4sleep30-21swapper/319:15:003
25382470,2sleep20-21swapper/200:20:162
9516994525,17cyclictest33-21ksoftirqd/200:05:002
134991430,0ptp4l401ktimersoftd/322:33:153
9517994237,3cyclictest21410-21cron23:55:013
134991420,0ptp4l401ktimersoftd/322:05:243
134991420,0ptp4l401ktimersoftd/320:27:583
134991420,0ptp4l401ktimersoftd/320:27:573
134991410,0ptp4l401ktimersoftd/322:15:273
9514994035,3cyclictest9-21ksoftirqd/023:25:000
134991400,0ptp4l401ktimersoftd/321:05:003
134991400,0ptp4l401ktimersoftd/320:44:233
134991390,0ptp4l401ktimersoftd/322:20:183
134991390,0ptp4l401ktimersoftd/322:20:183
9517993731,4cyclictest41-21ksoftirqd/300:37:313
9517993631,3cyclictest41-21ksoftirqd/322:53:223
9517993630,4cyclictest41-21ksoftirqd/323:06:393
9517993629,4cyclictest41-21ksoftirqd/322:13:313
9517993624,10cyclictest41-21ksoftirqd/320:18:343
9516993631,3cyclictest33-21ksoftirqd/222:14:252
9516993631,3cyclictest33-21ksoftirqd/200:07:372
9515993630,4cyclictest25-21ksoftirqd/123:58:121
9515993630,4cyclictest25-21ksoftirqd/123:32:481
9515993630,4cyclictest25-21ksoftirqd/121:45:301
9515993630,4cyclictest25-21ksoftirqd/119:38:211
9515993630,4cyclictest25-21ksoftirqd/119:13:591
9515993624,10cyclictest25-21ksoftirqd/119:51:341
9517993530,3cyclictest134991ptp4l00:17:063
9517993529,4cyclictest41-21ksoftirqd/323:42:333
9517993529,4cyclictest41-21ksoftirqd/321:51:573
9517993529,4cyclictest41-21ksoftirqd/321:47:103
9517993529,4cyclictest41-21ksoftirqd/321:36:533
9517993529,4cyclictest41-21ksoftirqd/321:23:443
9517993529,4cyclictest41-21ksoftirqd/320:47:113
9517993529,4cyclictest41-21ksoftirqd/300:02:353
9516993529,4cyclictest33-21ksoftirqd/222:46:122
9516993529,4cyclictest33-21ksoftirqd/221:02:222
9516993529,4cyclictest33-21ksoftirqd/220:52:182
9516993529,4cyclictest33-21ksoftirqd/220:03:252
9515993529,4cyclictest25-21ksoftirqd/123:47:451
9515993529,4cyclictest25-21ksoftirqd/121:39:561
9515993529,4cyclictest25-21ksoftirqd/120:57:241
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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