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2024-04-13 - 05:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot4.osadl.org (updated Sat Apr 13, 2024 00:46:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2944424680,7sleep30-21swapper/319:05:293
303012166146,9sleep10-21swapper/119:06:331
696221510,7sleep23086499cyclictest21:45:232
564981470,62rtkit-daemon25338-21apache219:09:210
2684821180,3sleep23086499cyclictest22:25:332
242932950,7sleep13086399cyclictest21:10:361
30865998578,4cyclictest41-21ksoftirqd/321:40:163
30862998233,5cyclictest9-21ksoftirqd/019:30:390
30865998174,4cyclictest41-21ksoftirqd/320:45:163
30862998125,5cyclictest9-21ksoftirqd/020:45:180
252102810,2sleep20-21swapper/221:15:232
30865998072,5cyclictest41-21ksoftirqd/300:30:193
30865998072,4cyclictest41-21ksoftirqd/321:00:173
30862998038,8cyclictest9-21ksoftirqd/000:00:270
30862998030,10cyclictest9-21ksoftirqd/023:55:400
30862998028,5cyclictest9-21ksoftirqd/022:40:240
30865997972,4cyclictest41-21ksoftirqd/320:35:173
30865997972,4cyclictest41-21ksoftirqd/319:55:183
30865997972,4cyclictest41-21ksoftirqd/319:55:183
30865997870,4cyclictest41-21ksoftirqd/319:10:163
30862997821,5cyclictest9-21ksoftirqd/021:25:000
30862997821,5cyclictest9-21ksoftirqd/021:25:000
30865997771,4cyclictest41-21ksoftirqd/319:30:203
30865997771,3cyclictest41-21ksoftirqd/322:10:183
30865997769,5cyclictest41-21ksoftirqd/320:40:183
30862997632,5cyclictest9-21ksoftirqd/022:10:000
209292760,2sleep00-21swapper/022:15:200
30862997523,5cyclictest9-21ksoftirqd/019:15:280
30862997425,5cyclictest9-21ksoftirqd/019:10:310
30862997236,6cyclictest9-21ksoftirqd/020:20:260
30865997163,4cyclictest41-21ksoftirqd/321:50:173
30863997132,8cyclictest25-21ksoftirqd/120:45:191
30862997132,8cyclictest9-21ksoftirqd/023:45:210
30865997062,4cyclictest41-21ksoftirqd/323:45:193
30865997062,4cyclictest41-21ksoftirqd/320:30:183
30863997032,8cyclictest25-21ksoftirqd/119:25:371
30863997031,8cyclictest25-21ksoftirqd/123:15:291
30863997031,8cyclictest25-21ksoftirqd/120:55:241
30862997040,5cyclictest9-21ksoftirqd/022:35:280
30862997019,5cyclictest9-21ksoftirqd/020:30:340
30865996960,5cyclictest41-21ksoftirqd/320:50:183
30865996960,5cyclictest41-21ksoftirqd/320:25:193
30862996917,5cyclictest9-21ksoftirqd/021:40:200
30862996834,9cyclictest9-21ksoftirqd/020:40:370
30865996736,5cyclictest41-21ksoftirqd/321:10:183
30865996727,8cyclictest41-21ksoftirqd/321:00:003
30862996715,4cyclictest9-21ksoftirqd/020:05:350
30862996712,8cyclictest9-21ksoftirqd/000:15:200
30865996658,5cyclictest41-21ksoftirqd/320:05:193
30865996658,4cyclictest41-21ksoftirqd/300:15:183
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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