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2024-05-14 - 19:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Tue May 14, 2024 12:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
314931899111103,5cyclictest3207750-21apt-get10:15:030
314931899110103,5cyclictest3218638-21kworker/u8:2+events_unbound10:45:250
31493189910696,7cyclictest3169262-21kworker/u8:3+events_unbound08:35:270
31493189910595,7cyclictest3162367-21kworker/u8:0+events_unbound07:55:030
31493189910392,7cyclictest3147574-21kworker/u8:0+flush-179:007:40:130
31493189910196,4cyclictest3223956-21kworker/u8:2+flush-179:011:05:310
31493189910094,4cyclictest3201356-21kworker/u8:1+flush-179:010:35:250
3149318999883,6cyclictest3232183-21kworker/u8:0+events_unbound11:40:280
3149318999786,9cyclictest3196868-21apt-get09:40:090
3149318999489,4cyclictest3246441-21kworker/u8:1+flush-179:012:35:260
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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