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2026-05-16 - 10:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Sat May 16, 2026 00:44:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31266159910392,7cyclictest3167395-21latency_hist21:15:001
31266139910090,7cyclictest3128092-21latency_hist19:15:010
3126615999885,11cyclictest3159475-21kworker/u8:3+flush-179:020:50:241
3126613999892,4cyclictest3159475-21kworker/u8:3+flush-179:021:00:010
3126615999583,8cyclictest3148026-21latency_hist20:15:021
3126615999485,6cyclictest3212763-21latency_hist23:35:011
3126613999488,4cyclictest3210228-21kworker/u8:1+flush-179:023:25:240
3126613999485,7cyclictest1213033-21systemd-journal22:00:000
3126613999386,5cyclictest3191322-21http22:30:000
3126613999080,7cyclictest3144835-21/usr/sbin/munin20:05:240
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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