You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2023-11-29 - 16:56

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #a, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  TI
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackaslot5s.osadl.org (updated Wed Nov 29, 2023 12:43:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
81770,0rcu_preempt3-21ksoftirqd/009:27:070
81700,0rcu_preempt3-21ksoftirqd/010:32:060
81650,0rcu_preempt3-21ksoftirqd/011:57:160
81650,0rcu_preempt3-21ksoftirqd/011:47:060
81630,0rcu_preempt29090-21php-cgi10:47:100
81610,0rcu_preempt3-21ksoftirqd/009:32:050
81600,0rcu_preempt3-21ksoftirqd/011:07:170
81600,0rcu_preempt3-21ksoftirqd/011:07:170
81590,0rcu_preempt1222-21ping08:12:310
81580,0rcu_preempt8404-21ls10:17:290
81580,0rcu_preempt8404-21ls10:17:290
81570,0rcu_preempt3-21ksoftirqd/012:27:360
81560,0rcu_preempt3-21ksoftirqd/011:22:080
81560,0rcu_preempt18948-21cyclictest09:02:160
10050560,0irq/346-484840054-21kswapd012:12:440
10050560,0irq/346-48484002576-21ls09:22:270
10050560,0irq/346-48484000-21swapper/012:18:580
10050550,0irq/346-484840054-21kswapd011:17:270
81540,0rcu_preempt3-21ksoftirqd/011:32:250
81540,0rcu_preempt3-21ksoftirqd/011:32:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional