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2024-06-17 - 18:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackbslot1.osadl.org (updated Mon Jun 17, 2024 12:44:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
39901532232207,14sleep20-21swapper/207:07:182
39902222219177,32sleep10-21swapper/107:08:131
39902142216170,36sleep30-21swapper/307:08:083
39902412208178,20sleep00-21swapper/007:08:290
3990578995955,2cyclictest7499-20VizCompositorTh08:05:000
3990582995750,5cyclictest21254-21/usr/share/muni11:45:021
3990582995349,3cyclictest4152981-21kworker/u8:2+flush-179:010:35:501
399058499520,2cyclictest4084700-21chrome09:05:012
3990582995249,2cyclictest4011117-21kworker/u8:2+events_unbound08:20:141
3990582995247,3cyclictest4099847-21kworker/u8:4+flush-179:009:45:061
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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