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2021-07-26 - 18:24

Intel(R) Xeon(R) CPU E31220 @ 3.10GHz, Linux 4.16.15-rt7 (Profile)

Latency plot of system in rack #b, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackbslot1.osadl.org (updated Mon Jul 26, 2021 12:44:03)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1009527333,7sleep10-21swapper/107:05:361
80002700,1sleep07860-31munin-html12:25:310
186902570,0sleep30-21swapper/307:20:153
16982550,2sleep11068299cyclictest12:15:311
1054825341,7sleep00-21swapper/007:09:480
1052724937,7sleep20-21swapper/207:09:382
1028124938,7sleep30-21swapper/307:07:223
10695991614,1cyclictest6584-21snmpd10:49:473
10677991614,1cyclictest6584-21snmpd12:12:170
10677991413,1cyclictest6584-21snmpd10:24:420
137422130,0sleep30-21swapper/310:50:023
10695991311,1cyclictest6584-21snmpd10:03:123
10682991311,1cyclictest6584-21snmpd10:11:001
1068299130,11cyclictest25537-31munin-graph07:30:481
10677991313,0cyclictest6584-21snmpd08:47:500
1069599120,1cyclictest13268-31munin-html11:40:313
1068899120,11cyclictest0-21swapper/212:35:302
1068899120,11cyclictest0-21swapper/208:22:012
10682991210,1cyclictest6584-21snmpd10:23:071
10682991210,1cyclictest6584-21snmpd08:31:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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