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2022-05-28 - 15:30

x86 Intel Xeon E3-1220 @3100 MHz, Linux 4.16.15-rt7 (Profile)

Latency plot of system in rack #b, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackbslot1.osadl.org (updated Sat May 28, 2022 12:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
123352670,1sleep312316-31munin-html07:55:323
258152580,0sleep10-21swapper/112:15:171
162222580,0sleep10-21swapper/108:05:031
1443525632,8sleep00-21swapper/007:06:440
1434825442,7sleep30-21swapper/307:05:593
1464825139,7sleep10-21swapper/107:08:451
1438025038,7sleep20-21swapper/207:06:102
14894991614,1cyclictest17929-21snmpd11:34:550
14909991513,1cyclictest17929-21snmpd10:59:332
257182140,0sleep10-21swapper/108:20:131
257182140,0sleep10-21swapper/108:20:131
14902991413,0cyclictest17929-21snmpd07:35:021
14894991412,1cyclictest6364-21awk10:45:100
14917991313,0cyclictest17929-21snmpd08:04:583
14902991313,0cyclictest17929-21snmpd11:57:581
14902991313,0cyclictest17929-21snmpd09:18:031
14894991312,0cyclictest17929-21snmpd12:29:420
14894991311,1cyclictest29262-31munin-html12:20:320
14894991311,1cyclictest17929-21snmpd08:17:280
14894991311,1cyclictest1303-21lldpd10:11:270
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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