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2022-10-04 - 08:41

x86 Intel Xeon E3-1220 @3100 MHz, Linux 4.16.15-rt7 (Profile)

Latency plot of system in rack #b, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackbslot1.osadl.org (updated Thu Aug 04, 2022 12:44:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2352599407405,1cyclictest20703-31munin-html07:55:311
2352599406401,4cyclictest9561-31munin-html08:30:301
23525993960,1cyclictest30874-31munin-html10:00:321
2353799395393,1cyclictest16132-31munin-html09:35:323
2353799393387,5cyclictest11981-31munin-html07:40:333
2353099392390,1cyclictest16122-31munin-html09:35:322
2353099389383,5cyclictest11985-31munin-html07:40:322
2353799383378,4cyclictest6589-31munin-html08:25:333
2352599381379,1cyclictest0-21swapper/107:40:461
2353099380375,4cyclictest6581-31munin-html08:25:332
2352599380378,1cyclictest0-21swapper/108:26:101
2353799379377,1cyclictest0-21swapper/308:13:013
2351999378376,1cyclictest0-21swapper/008:07:350
2353799377375,1cyclictest0-21swapper/310:36:243
2353099376374,1cyclictest0-21swapper/208:13:012
2353099374370,3cyclictest19551-31munin-html10:35:332
2351999374372,1cyclictest0-21swapper/009:51:310
2351999368366,1cyclictest15535-31munin-html08:40:310
2351999365363,1cyclictest27518-31munin-html09:00:310
2353799364363,0cyclictest20943-31munin-html07:55:313
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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