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2022-06-27 - 16:16

x86 Intel Xeon E3-1220 @3100 MHz, Linux 4.16.15-rt7 (Profile)

Latency plot of system in rack #b, slot #1
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Command line: cyclictest -l100000000 -m -Sp99 -i200 -h400 -q
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackbslot1.osadl.org (updated Mon Jun 27, 2022 12:44:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
577825846,7sleep30-21swapper/307:07:503
589125734,7sleep00-21swapper/007:08:510
586525443,7sleep10-21swapper/107:08:361
556724836,7sleep20-21swapper/207:05:522
6136991614,1cyclictest17929-21snmpd10:05:181
6148991413,1cyclictest17929-21snmpd08:45:013
6143991413,0cyclictest17929-21snmpd07:51:082
6143991412,1cyclictest17929-21snmpd10:35:222
6136991414,0cyclictest17929-21snmpd10:55:471
6130991412,1cyclictest17929-21snmpd09:23:470
6143991311,1cyclictest1138-31munin-html08:45:332
6130991311,1cyclictest17929-21snmpd07:44:560
6148991210,1cyclictest7115-31munin-html08:55:313
6143991210,1cyclictest17929-21snmpd12:23:062
6136991212,0cyclictest17929-21snmpd09:01:551
6130991210,1cyclictest393-31munin-html12:20:340
6130991210,1cyclictest0-21swapper/008:25:290
613099120,1cyclictest23894-31munin-graph12:05:420
614899119,1cyclictest0-21swapper/309:45:343
614899119,1cyclictest0-21swapper/307:55:183
6148991110,1cyclictest17929-21snmpd09:14:023
614899110,1cyclictest0-21swapper/309:56:043
614399119,1cyclictest17929-21snmpd10:34:432
614399119,1cyclictest17929-21snmpd08:21:242
614399110,10cyclictest0-21swapper/212:34:002
613699119,1cyclictest0-21swapper/111:25:361
613699110,1cyclictest0-21swapper/108:00:421
613699110,10cyclictest0-21swapper/108:20:241
613699110,10cyclictest0-21swapper/108:15:141
613099119,1cyclictest14849-31munin-html11:50:330
613099119,1cyclictest14849-31munin-html11:50:320
613099119,1cyclictest0-21swapper/007:14:540
6130991111,0cyclictest17929-21snmpd10:01:570
613099110,10cyclictest18596-21/usr/share/muni12:00:030
613099110,10cyclictest0-21swapper/011:10:110
614899109,1cyclictest17929-21snmpd11:08:333
6148991010,0cyclictest17929-21snmpd08:39:373
6148991010,0cyclictest17929-21snmpd08:29:373
614399109,0cyclictest0-21swapper/208:00:302
614399108,1cyclictest22174-21missed_timers10:15:192
614399108,1cyclictest0-21swapper/209:55:472
614399108,1cyclictest0-21swapper/209:00:052
614399108,1cyclictest0-21swapper/207:39:022
614399108,1cyclictest0-21swapper/207:13:212
6143991010,0cyclictest17929-21snmpd09:43:402
614399100,9cyclictest0-21swapper/212:26:162
614399100,9cyclictest0-21swapper/212:11:052
614399100,9cyclictest0-21swapper/210:06:162
614399100,9cyclictest0-21swapper/209:24:372
614399100,1cyclictest0-21swapper/212:05:262
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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