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2024-05-11 - 13:04

Dates and Events:

OSADL Articles:

2023-11-12 12:00

Open Source License Obligations Checklists even better now

Import the checklists to other tools, create context diffs and merged lists


2023-03-01 12:00

Embedded Linux distributions

Results of the online "wish list"


2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available



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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (by bogoMIPS) - (x86 CPU strings)

BoxArchCoresMHzBogo​MIPS ↑Effective
r4s5arm​v7l1 x 1500011.05. 03:06
rbs2sx86_​641 x 13,500007.09. 15:06
r9s7arm​v7l2 x 11,000011.05. 04:59
r7s3arm​v6l1 x 1700511.05. 04:02
res7sarm​v7l0 x 1 x 11,0001212.01. 05:12
res7arm​v7l0 x 1 x 11,0001211.05. 06:42
ras5arm​v7l2 x 11,0002411.05. 05:08
rbs3arm​v7l4 x 19962410.05. 16:54
ras5sarm​v7l2 x 11,0002411.05. 05:09
rbs7sarm​v7l4 x 19962411.05. 05:34
rbs7arm​v7l4 x 19962811.05. 05:32
r1s4sarm​v7l2 x 14004811.05. 01:56
r1s4arm​v7l2 x 11,2004811.05. 01:55
r5s7sarm​v7l1 x 15286411.05. 03:40
r2s6saarch​644 x 11,3506411.05. 02:14
r5s7arm​v7l1 x 15286411.05. 03:38
rbs5saarch​644 x 11,6006411.05. 05:27
r2s5ppc1 x 13966627.03. 13:43
r4s6sarm​v7l0 x 1 x 11,0006611.05. 03:11
ras7ppc1 x 13966511.05. 05:14
r2s8ppc1 x 14006611.05. 02:20
r3s4aarch​646 x 11,3009611.05. 02:30
r5s6ppc1 x 153313311.05. 03:36
r2s1arm​v5tejl1 x 120019911.05. 02:06
r4s5saarch​644 x 11,60020027.03. 14:13
r3s5i5861 x 113326511.05. 02:35
r3s2riscv641 x 11,00028411.05. 02:25
r3s2sriscv644 x 1028411.05. 02:27
r7s4arm​v7l1 x 153634811.05. 04:08
rbs3sarm​v7l4 x 11,40035611.05. 05:21
r7s3sarm​v7l4 x 11,40035611.05. 04:05
r4s8arm​v7l1 x 140039811.05. 03:16
r4s2sarm​v7l1 x 180039811.05. 02:53
ras4arm​v7l1 x 150039811.05. 05:07
r4s8sarm​v7l1 x 140039811.05. 03:17
r7s6arm​v7l1 x 11,00039828.02. 14:10
r3s5sppc2 x 11,20040011.05. 02:38
r2s7saarch​644 x 11,50043211.05. 02:18
rfs1aarch​644 x 11,50043211.05. 06:47
rfs2aarch​644 x 11,50043211.05. 06:48
r2s7aarch​644 x 12,40043211.05. 02:15
r8s6arm​v7l1 x 150049811.05. 04:32
r4s4ppc4 x 11,20049811.05. 03:02
r2s2arm​v7l1 x 172049911.05. 02:07
r1s7arm​v6l1 x 172053011.05. 02:01
r2s4mips​641 x 180053124.12. 13:46
r5s5arm​v7l1 x 160059711.05. 03:33
ras4sarm​v7l1 x 160059707.02. 02:45
r7s8sarm​v7l1 x 11,00059711.05. 04:19
r5s5sarm​v7l1 x 160060001.05. 15:04
r2s3arm​v7l0 x 1 x 162462411.05. 02:09
r8s1i5861 x 135070111.05. 04:21
r7s2sarm​v7l4 x 11,50072013.07. 02:16
r1s5aarch​644 x 11,20079611.05. 01:57
r9s8sarm​v7l1 x 180079611.05. 05:00
r4s2arm​v7l1 x 180079611.05. 02:51
rfs4arm​v7l1 x 180080011.05. 06:50
rfs4sarm​v7l1 x 180080011.05. 06:56
ras3sarm​v7l1 x 11,30084011.05. 05:06
r7s8arm​v7l1 x 11,00099511.05. 04:17
r4s3i5861 x 150099611.05. 02:58
r3s7i6861 x 15331,06611.05. 02:42
r7s4sarm​v7l4 x 11,5001,08011.05. 04:10
r4s1sarm​v7l4 x 11,5001,08011.05. 02:48
r4s1arm​v7l4 x 11,5001,08011.05. 02:46
r2s3sarm​v7l0 x 1 x 16001,20011.05. 02:10
r9s1sarm​v7l1 x 101,25014.04. 18:03
res3saarch​640 x 1 x 11,0001,60011.05. 06:31
res6saarch​644 x 101,60011.05. 06:40
ras6sarm​v7l1 x 11,0001,98711.05. 05:13
r7s5i6861 x 11,3002,59311.05. 04:12
rbs8arm​v7l2 x 16662,65011.05. 05:35
ras1i6861 x 11,4002,79911.05. 05:03
r4s3si6861 x 11,4662,93211.05. 03:01
r6s5i6861 x 11,5002,99211.05. 03:53
r2s6i6861 x 11,5002,99911.05. 02:11
r6s6i6861 x 11,6003,19111.05. 03:56
ras6aarch​648 x 12,0003,20011.05. 05:10
r3s6x86_​641 x 11,6603,33311.05. 02:39
r9s4i6861 x 21,0003,99011.05. 04:46
r9s1x86_​642 x 12,0003,99211.05. 04:40
ras3aarch​648 x 12,0004,00011.05. 05:06
ras2x86_​642 x 11,0674,26611.05. 05:05
rcs4x86_​642 x 11,1004,37610.05. 17:21
r6s4x86_​642 x 11,1004,37611.05. 03:51
r8s8x86_​642 x 11,3005,14411.05. 04:37
rbs6sx86_​642 x 11,3335,33211.05. 05:30
r9s4sx86_​642 x 11,3335,34711.05. 04:52
rcs3i6862 x 11,4005,58611.05. 05:47
r1s8i6861 x 21,6006,39811.05. 02:02
r4s7sx86_​642 x 11,8337,33211.05. 03:15
r6s1x86_​642 x 12,0007,97811.05. 03:45
rcs4sx86_​644 x 11,1008,75211.05. 05:52
res6x86_​644 x 11,1008,75211.05. 06:38
r6s7i6862 x 12,3009,17611.01. 02:44
r6s2x86_​642 x 11,6679,57811.05. 03:47
rbs4x86_​644 x 11,2009,60011.05. 05:24
r9s5x86_​642 x 12,70010,77413.07. 03:15
r8s7x86_​642 x 12,70010,77611.05. 04:33
rcs5x86_​642 x 12,80011,19811.05. 05:54
rcs5sx86_​642 x 12,80011,19811.05. 05:57
rcs2x86_​642 x 12,80011,23211.05. 05:46
rcs7sx86_​644 x 11,50011,98011.05. 06:02
r9s2sx86_​644 x 11,60012,74830.08. 17:02
rds7x86_​644 x 11,60012,74811.05. 06:22
rds5x86_​644 x 11,60012,74811.05. 06:19
r9s3x86_​644 x 11,60012,74811.05. 04:43
r9s2x86_​644 x 11,60012,74811.05. 04:41
rds6x86_​644 x 11,60012,74811.05. 06:21
ras8sx86_​644 x 11,60012,74811.05. 05:16
rbs4sx86_​644 x 11,60012,74811.05. 05:25
rds8x86_​644 x 11,60012,74811.05. 06:23
r5s3sx86_​644 x 11,60012,74811.05. 03:26
r7s7x86_​644 x 11,60012,76711.05. 04:14
r7s1x86_​644 x 11,60012,84011.05. 04:00
r8s7sx86_​642 x 13,30013,19811.05. 04:35
r1s6sx86_​642 x 21,66713,33211.05. 02:00
r9s5sx86_​642 x 13,50013,99811.05. 04:55
rcs7x86_​642 x 21,80014,39611.05. 06:01
res1sx86_​644 x 11,60014,40011.05. 06:27
ras8x86_​644 x 11,60014,40011.05. 05:14
res2x86_​644 x 11,60014,40011.05. 06:28
res1x86_​644 x 11,60014,40011.05. 06:26
r4s7i6864 x 11,83314,66411.05. 03:13
res8sx86_​644 x 11,90015,05211.05. 06:45
res8x86_​644 x 11,90015,05211.05. 06:43
res4sx86_​644 x 11,90015,05211.05. 06:34
res4x86_​644 x 11,90015,05211.05. 06:32
r1s8sx86_​644 x 11,90015,19611.05. 02:04
rds3x86_​644 x 11,91015,32411.05. 06:16
rds4x86_​644 x 11,91015,32411.05. 06:18
rds2x86_​644 x 11,91015,32411.05. 06:15
rbs6x86_​644 x 11,91515,32411.05. 05:28
rds1x86_​644 x 11,91015,32411.05. 06:14
res3x86_​644 x 12,00015,97211.05. 06:29
rbs2x86_​644 x 12,00015,97211.05. 05:19
rbs1x86_​644 x 12,00015,97211.05. 05:18
r8s2x86_​642 x 22,10016,76011.05. 04:23
r8s2sx86_​642 x 22,10016,76011.05. 04:25
r1s6x86_​642 x 22,13017,06411.05. 01:58
r5s0x86_​642 x 22,20017,58211.05. 03:18
rbs0i6862 x 22,50017,60011.05. 05:17
r6s8x86_​642 x 22,30018,35611.05. 03:57
r4s0x86_​642 x 22,30018,39611.05. 02:45
r7s7sx86_​642 x 22,30018,39611.05. 04:15
r7s0x86_​642 x 22,30018,40011.05. 03:59
r9s0x86_​642 x 22,30018,40011.05. 04:39
r8s0x86_​642 x 22,30018,40011.05. 04:20
ras0x86_​642 x 22,30018,41611.05. 05:01
r3s1i6864 x 12,40019,12711.05. 02:23
res5sx86_​642 x 22,20019,20011.05. 06:37
res5x86_​642 x 22,20019,20011.05. 06:35
r5s4x86_​642 x 22,53020,26411.05. 03:27
r5s4sx86_​642 x 22,53020,26411.05. 03:29
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r8s3x86_​644 x 12,66721,28011.05. 04:26
r3s6sx86_​642 x 22,66721,33211.05. 02:41
r1s1x86_​642 x 22,60021,69611.05. 01:48
r5s2x86_​644 x 12,70021,69911.05. 03:21
r1s3x86_​644 x 12,80022,42411.05. 01:53
r9s6x86_​642 x 23,00023,94411.05. 04:56
r9s3sx86_​644 x 13,00024,00011.05. 04:45
r1s0x86_​644 x 13,10024,79611.05. 01:46
r2s0x86_​644 x 13,10024,80011.05. 02:05
r1s2sx86_​644 x 12,30028,00011.05. 01:51
r1s2x86_​644 x 12,30028,00011.05. 01:50
r8s4sx86_​644 x 21,60028,80011.05. 04:30
r8s4x86_​644 x 21,60028,80011.05. 04:28
r0s7sx86_​642 x 23,70029,52811.05. 01:40
r5s3x86_​644 x 22,00031,87211.05. 03:24
res0x86_​644 x 21,80031,99211.05. 06:24
rds0x86_​644 x 21,80031,99211.05. 06:12
r6s3x86_​644 x 22,20035,12011.05. 03:49
r3s8i6866 x 13,20038,52611.05. 02:43
rbs8sx86_​644 x 22,40038,70411.05. 05:37
r0s0x86_​644 x 22,50040,00011.05. 01:10
r5s1x86_​646 x 13,33340,09211.05. 03:20
rbs5i6864 x 2049,53911.05. 05:26
r0s1sx86_​644 x 23,30052,67211.05. 01:12
rcs3sx86_​644 x 23,30052,69611.05. 05:49
rcs8sx86_​644 x 23,30052,79211.05. 06:11
r4s6x86_​644 x 23,40054,25611.05. 03:07
r8s5i6864 x 23,40054,40011.05. 04:31
r0s2x86_​644 x 23,50055,86411.05. 01:13
r0s1x86_​644 x 22,30055,99211.05. 01:11
r3s0i6864 x 23,50055,99211.05. 02:21
r5s2sx86_​644 x 24,00063,86312.04. 01:34
rcs6x86_​644 x 23,50063,99211.05. 05:59
r0s3sx86_​644 x 23,60067,20011.05. 01:21
r0s2sx86_​6410 x 13,70073,99011.05. 01:15
rcs0x86_​648 x 22,40076,60011.05. 05:41
r3s3x86_​646 x 23,33379,99211.05. 02:28
rcs1x86_​646 x 23,46783,37611.05. 05:44
r0s8sx86_​646 x 23,47083,38811.05. 01:45
r0s6x86_​648 x 23,600115,20011.05. 01:31
r0s4sx86_​648 x 23,600115,20011.05. 01:25
r0s5sx86_​648 x 23,600115,20011.05. 01:26
r0s4x86_​648 x 23,600115,20011.05. 01:23
r0s7x86_​648 x 23,600115,20011.05. 01:36
r0s8x86_​648 x 23,600115,20011.05. 01:42
r0s3x86_​648 x 23,600115,20011.05. 01:17
r0s5x86_​648 x 23,500115,20010.05. 01:25
rfs0x86_​6416 x 22,000128,00011.05. 06:46
r6s0x86_​642 x 10 x 21,700136,18011.05. 03:43
r0s6sx86_​6410 x 23,700147,98011.05. 01:33
rcs8x86_​6416 x 23,700217,15211.05. 06:09
 

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