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2024-05-15 - 07:39

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OSADL Articles:

2023-11-12 12:00

Open Source License Obligations Checklists even better now

Import the checklists to other tools, create context diffs and merged lists


2023-03-01 12:00

Embedded Linux distributions

Results of the online "wish list"


2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available



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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (by bogoMIPS) - (x86 CPU strings)

BoxArchCoresMHzBogo​MIPS ↑Effective
r4s5arm​v7l1 x 1500015.05. 03:01
rbs2sx86_​641 x 13,500007.09. 15:06
r9s7arm​v7l2 x 11,000015.05. 04:55
r7s3arm​v6l1 x 1700515.05. 03:56
res7sarm​v7l0 x 1 x 11,0001212.01. 05:12
res7arm​v7l0 x 1 x 11,0001215.05. 06:35
ras5arm​v7l2 x 11,0002414.05. 17:11
ras5sarm​v7l2 x 11,0002415.05. 05:04
rbs7sarm​v7l4 x 19962415.05. 05:29
rbs7arm​v7l4 x 19962815.05. 05:27
rbs3arm​v7l4 x 19962815.05. 05:16
r5s7sarm​v7l1 x 15284815.05. 03:36
r1s4sarm​v7l2 x 14004815.05. 01:54
r1s4arm​v7l2 x 11,2004815.05. 01:53
r2s6saarch​644 x 11,3506415.05. 02:10
r5s7arm​v7l1 x 15286414.05. 15:43
rbs5saarch​644 x 11,6006415.05. 05:23
r2s5ppc1 x 13966627.03. 13:43
r4s6sarm​v7l0 x 1 x 11,0006615.05. 03:05
ras7ppc1 x 13966515.05. 05:08
r2s8ppc1 x 14006615.05. 02:16
r3s4aarch​646 x 11,3009615.05. 02:26
r5s6ppc1 x 153313314.05. 15:42
r2s1arm​v5tejl1 x 120019915.05. 02:05
r4s5saarch​644 x 11,60020027.03. 14:13
r3s5i5861 x 113326515.05. 02:31
r3s2riscv641 x 11,00028415.05. 02:21
r3s2sriscv644 x 1028415.05. 02:22
r7s4arm​v7l1 x 153634815.05. 04:02
rbs3sarm​v7l4 x 11,40035615.05. 05:16
r7s3sarm​v7l4 x 11,40035615.05. 03:59
r4s8arm​v7l1 x 140039815.05. 03:11
ras4arm​v7l1 x 150039815.05. 05:03
r4s8sarm​v7l1 x 140039815.05. 03:13
r7s6arm​v7l1 x 11,00039828.02. 14:10
r3s5sppc2 x 11,20040015.05. 02:33
r2s7saarch​644 x 11,50043215.05. 02:14
rfs1aarch​644 x 11,50043215.05. 06:41
rfs2aarch​644 x 11,50043215.05. 06:42
r2s7aarch​644 x 12,40043215.05. 02:11
r8s6arm​v7l1 x 150049815.05. 04:27
r4s4ppc4 x 11,20049815.05. 02:57
r2s2arm​v7l1 x 172049915.05. 02:05
r1s7arm​v6l1 x 172053015.05. 01:59
r4s2sarm​v7l1 x 180053015.05. 02:49
r2s4mips​641 x 180053124.12. 13:46
r5s5arm​v7l1 x 160059715.05. 03:27
ras4sarm​v7l1 x 160059707.02. 02:45
r5s5sarm​v7l1 x 160060015.05. 03:29
r2s3arm​v7l0 x 1 x 162462415.05. 02:06
r8s1i5861 x 135070115.05. 04:15
r7s2sarm​v7l4 x 11,50072013.07. 02:16
r1s5aarch​644 x 11,20079615.05. 01:55
r9s8sarm​v7l1 x 180079615.05. 04:56
r4s2arm​v7l1 x 180079615.05. 02:47
r7s8sarm​v7l1 x 11,00079615.05. 04:12
rfs4arm​v7l1 x 180080015.05. 06:42
rfs4sarm​v7l1 x 180080015.05. 06:50
ras3sarm​v7l1 x 11,30084015.05. 05:02
r7s8arm​v7l1 x 11,00099515.05. 04:11
r4s3i5861 x 150099615.05. 02:53
r3s7i6861 x 15331,06615.05. 02:37
r7s4sarm​v7l4 x 11,5001,08015.05. 04:05
r4s1sarm​v7l4 x 11,5001,08015.05. 02:43
r4s1arm​v7l4 x 11,5001,08015.05. 02:41
r2s3sarm​v7l0 x 1 x 16001,20015.05. 02:08
r9s1sarm​v7l1 x 101,25014.04. 18:03
res3saarch​640 x 1 x 11,0001,60015.05. 06:25
res6saarch​644 x 101,60015.05. 06:33
ras6sarm​v7l1 x 11,0001,98715.05. 05:07
r7s5i6861 x 11,3002,59315.05. 04:05
rbs8arm​v7l2 x 16662,65015.05. 05:31
ras1i6861 x 11,4002,79915.05. 04:59
r4s3si6861 x 11,4662,93215.05. 02:55
r6s5i6861 x 11,5002,99215.05. 03:46
r2s6i6861 x 11,5002,99915.05. 02:09
r6s6i6861 x 11,6003,19115.05. 03:49
ras6aarch​648 x 12,0003,20015.05. 05:05
r3s6x86_​641 x 11,6603,33315.05. 02:34
r9s4i6861 x 21,0003,99015.05. 04:43
r9s1x86_​642 x 12,0003,99215.05. 04:37
ras3aarch​648 x 12,0004,00015.05. 05:01
ras2x86_​642 x 11,0674,26615.05. 05:00
rcs4x86_​642 x 11,1004,37615.05. 05:47
r6s4x86_​642 x 11,1004,37615.05. 03:44
r8s8x86_​642 x 11,3005,14415.05. 04:32
rbs6sx86_​642 x 11,3335,33215.05. 05:25
r9s4sx86_​642 x 11,3335,34715.05. 04:49
rcs3i6862 x 11,4005,58615.05. 05:42
r1s8i6861 x 21,6006,39815.05. 02:00
r4s7sx86_​642 x 11,8337,33215.05. 03:09
r6s1x86_​642 x 12,0007,97815.05. 03:40
rcs4sx86_​644 x 11,1008,75215.05. 05:49
res6x86_​644 x 11,1008,75215.05. 06:32
r6s7i6862 x 12,3009,17611.01. 02:44
r6s2x86_​642 x 11,6679,57815.05. 03:41
rbs4x86_​644 x 11,2009,60015.05. 05:19
r9s5x86_​642 x 12,70010,77413.07. 03:15
r8s7x86_​642 x 12,70010,77615.05. 04:28
rcs5x86_​642 x 12,80011,19815.05. 05:51
rcs5sx86_​642 x 12,80011,19815.05. 05:54
rcs2x86_​642 x 12,80011,23215.05. 05:41
rcs7sx86_​644 x 11,50011,98015.05. 05:57
r9s2sx86_​644 x 11,60012,74830.08. 17:02
rds7x86_​644 x 11,60012,74814.05. 18:26
rds5x86_​644 x 11,60012,74815.05. 06:14
r9s3x86_​644 x 11,60012,74815.05. 04:40
r9s2x86_​644 x 11,60012,74815.05. 04:38
rds6x86_​644 x 11,60012,74815.05. 06:16
ras8sx86_​644 x 11,60012,74815.05. 05:10
rbs4sx86_​644 x 11,60012,74815.05. 05:20
rds8x86_​644 x 11,60012,74815.05. 06:17
r5s3sx86_​644 x 11,60012,74815.05. 03:20
r7s7x86_​644 x 11,60012,76715.05. 04:07
r7s1x86_​644 x 11,60012,84015.05. 03:55
r8s7sx86_​642 x 13,30013,19815.05. 04:30
r1s6sx86_​642 x 21,66713,33215.05. 01:57
r9s5sx86_​642 x 13,50013,99815.05. 04:51
rcs7x86_​642 x 21,80014,39615.05. 05:55
res1sx86_​644 x 11,60014,40015.05. 06:21
ras8x86_​644 x 11,60014,40015.05. 05:09
res2x86_​644 x 11,60014,40015.05. 06:22
res1x86_​644 x 11,60014,40015.05. 06:20
r4s7i6864 x 11,83314,66415.05. 03:08
res8sx86_​644 x 11,90015,05215.05. 06:38
res8x86_​644 x 11,90015,05215.05. 06:36
res4sx86_​644 x 11,90015,05215.05. 06:27
res4x86_​644 x 11,90015,05215.05. 06:26
r1s8sx86_​644 x 11,90015,19615.05. 02:02
rds3x86_​644 x 11,91015,32415.05. 06:11
rds4x86_​644 x 11,91015,32415.05. 06:12
rds2x86_​644 x 11,91015,32415.05. 06:10
rbs6x86_​644 x 11,91515,32415.05. 05:24
rds1x86_​644 x 11,91015,32415.05. 06:08
res3x86_​644 x 12,00015,97215.05. 06:23
rbs2x86_​644 x 12,00015,97215.05. 05:15
rbs1x86_​644 x 12,00015,97215.05. 05:14
r8s2x86_​642 x 22,10016,76015.05. 04:17
r8s2sx86_​642 x 22,10016,76015.05. 04:19
r1s6x86_​642 x 22,13017,06415.05. 01:56
r5s0x86_​642 x 22,20017,58215.05. 03:14
rbs0i6862 x 22,50017,60015.05. 05:12
r6s8x86_​642 x 22,30018,35615.05. 03:52
r4s0x86_​642 x 22,30018,39615.05. 02:40
r7s7sx86_​642 x 22,30018,39615.05. 04:08
r7s0x86_​642 x 22,30018,40015.05. 03:53
r9s0x86_​642 x 22,30018,40015.05. 04:34
r8s0x86_​642 x 22,30018,40015.05. 04:13
ras0x86_​642 x 22,30018,41615.05. 04:57
r3s1i6864 x 12,40019,12715.05. 02:19
res5sx86_​642 x 22,20019,20015.05. 06:30
res5x86_​642 x 22,20019,20015.05. 06:28
r5s4x86_​642 x 22,53020,26415.05. 03:22
r5s4sx86_​642 x 22,53020,26415.05. 03:24
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r8s3x86_​644 x 12,66721,28015.05. 04:20
r3s6sx86_​642 x 22,66721,33215.05. 02:36
r1s1x86_​642 x 22,60021,69615.05. 01:48
r5s2x86_​644 x 12,70021,69915.05. 03:16
r1s3x86_​644 x 12,80022,42415.05. 01:51
r9s6x86_​642 x 23,00023,94415.05. 04:53
r9s3sx86_​644 x 13,00024,00015.05. 04:41
r1s0x86_​644 x 13,10024,79615.05. 01:46
r2s0x86_​644 x 13,10024,80015.05. 02:03
r1s2sx86_​644 x 12,30028,00015.05. 01:50
r1s2x86_​644 x 12,30028,00015.05. 01:49
r8s4sx86_​644 x 21,60028,80015.05. 04:24
r8s4x86_​644 x 21,60028,80015.05. 04:22
r0s7sx86_​642 x 23,70029,52815.05. 01:41
r5s3x86_​644 x 22,00031,87215.05. 03:18
res0x86_​644 x 21,80031,99215.05. 06:18
rds0x86_​644 x 21,80031,99215.05. 06:07
r6s3x86_​644 x 22,20035,12015.05. 03:42
r3s8i6866 x 13,20038,52615.05. 02:39
rbs8sx86_​644 x 22,40038,70415.05. 05:33
r0s0x86_​644 x 22,50040,00015.05. 01:10
r5s1x86_​646 x 13,33340,09215.05. 03:15
rbs5i6864 x 2049,53915.05. 05:22
r0s1sx86_​644 x 23,30052,67215.05. 01:12
rcs3sx86_​644 x 23,30052,69615.05. 05:45
rcs8sx86_​644 x 23,30052,79215.05. 06:05
r4s6x86_​644 x 23,40054,25615.05. 03:02
r8s5i6864 x 23,40054,40015.05. 04:26
r0s2x86_​644 x 23,50055,86415.05. 01:13
r0s1x86_​644 x 22,30055,99214.05. 13:12
r3s0i6864 x 23,50055,99215.05. 02:17
r5s2sx86_​644 x 24,00063,86312.04. 01:34
rcs6x86_​644 x 23,50063,99211.05. 17:51
r0s3sx86_​644 x 23,60067,20015.05. 01:21
r0s2sx86_​6410 x 13,70073,99015.05. 01:15
rcs0x86_​648 x 22,40076,60015.05. 05:37
r3s3x86_​646 x 23,33379,99215.05. 02:24
rcs1x86_​646 x 23,46783,37615.05. 05:39
r0s8sx86_​646 x 23,47083,38815.05. 01:45
r0s6x86_​648 x 23,600115,20015.05. 01:32
r0s4sx86_​648 x 23,600115,20015.05. 01:24
r0s5sx86_​648 x 23,600115,20015.05. 01:28
r0s4x86_​648 x 23,600115,20015.05. 01:23
r0s7x86_​648 x 23,600115,20015.05. 01:36
r0s8x86_​648 x 23,600115,20015.05. 01:43
r0s3x86_​648 x 23,600115,20015.05. 01:16
r0s5x86_​648 x 23,500115,20015.05. 01:26
rfs0x86_​6416 x 22,000128,00015.05. 06:40
r6s0x86_​642 x 10 x 21,700136,18015.05. 03:38
r0s6sx86_​6410 x 23,700147,98015.05. 01:34
rcs8x86_​6416 x 23,700217,15215.05. 06:03
 

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