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2024-05-21 - 18:22

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OSADL Articles:

2023-11-12 12:00

Open Source License Obligations Checklists even better now

Import the checklists to other tools, create context diffs and merged lists


2023-03-01 12:00

Embedded Linux distributions

Results of the online "wish list"


2022-01-13 12:00

Phase #3 of OSADL project on OPC UA PubSub over TSN successfully completed

Another important milestone on the way to interoperable Open Source real-time Ethernet has been reached


2021-02-09 12:00

Open Source OPC UA PubSub over TSN project phase #3 launched

Letter of Intent with call for participation is now available



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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (by bogoMIPS) - (x86 CPU strings)

BoxArchCoresMHzBogo​MIPS ↑Effective
r4s5arm​v7l1 x 1500021.05. 15:05
rbs2sx86_​641 x 13,500007.09. 15:06
r9s7arm​v7l2 x 11,000021.05. 17:00
r7s3arm​v6l1 x 1700521.05. 16:04
res7sarm​v7l0 x 1 x 11,0001212.01. 05:12
res7arm​v7l0 x 1 x 11,0001221.05. 06:16
ras5arm​v7l2 x 11,0002421.05. 17:09
ras5sarm​v7l2 x 11,0002421.05. 17:10
rbs7sarm​v7l4 x 19962421.05. 17:34
rbs7arm​v7l4 x 19962821.05. 17:32
rbs3arm​v7l4 x 19962821.05. 17:20
r1s4sarm​v7l2 x 14004821.05. 13:59
r1s4arm​v7l2 x 11,2004821.05. 13:58
r5s7sarm​v7l1 x 15286421.05. 15:43
r2s6saarch​644 x 11,3506421.05. 14:15
r5s7arm​v7l1 x 15286421.05. 15:41
rbs5saarch​644 x 11,6006421.05. 17:27
r2s5ppc1 x 13966627.03. 13:43
r4s6sarm​v7l0 x 1 x 11,0006621.05. 15:10
ras7ppc1 x 13966521.05. 17:13
r2s8ppc1 x 14006621.05. 02:06
r3s4aarch​646 x 11,3009621.05. 14:30
r5s6ppc1 x 153313321.05. 15:40
r2s1arm​v5tejl1 x 120019921.05. 14:09
r4s5saarch​644 x 11,60020027.03. 14:13
r3s5i5861 x 113326521.05. 14:35
r3s2riscv641 x 11,00028421.05. 14:24
r3s2sriscv644 x 1028421.05. 14:26
r7s4arm​v7l1 x 153634821.05. 16:11
rbs3sarm​v7l4 x 11,40035621.05. 17:21
r7s3sarm​v7l4 x 11,40035621.05. 16:07
r4s8arm​v7l1 x 140039821.05. 15:16
ras4arm​v7l1 x 150039821.05. 17:08
r4s8sarm​v7l1 x 140039821.05. 15:16
r7s6arm​v7l1 x 11,00039828.02. 14:10
r3s5sppc2 x 11,20040021.05. 14:38
r2s7saarch​644 x 11,50043221.05. 14:18
rfs1aarch​644 x 11,50043221.05. 06:22
rfs2aarch​644 x 11,50043221.05. 06:23
r2s7aarch​644 x 12,40043221.05. 14:16
r8s6arm​v7l1 x 150049821.05. 16:35
r4s4ppc4 x 11,20049821.05. 15:01
r2s2arm​v7l1 x 172049921.05. 14:10
r1s7arm​v6l1 x 172053021.05. 14:04
r4s2sarm​v7l1 x 180053021.05. 14:54
r2s4mips​641 x 180053124.12. 13:46
r5s5arm​v7l1 x 160059721.05. 15:31
ras4sarm​v7l1 x 160059707.02. 02:45
r7s8sarm​v7l1 x 11,00059721.05. 16:20
r5s5sarm​v7l1 x 160060021.05. 15:34
r2s3arm​v7l0 x 1 x 162462421.05. 14:10
r8s1i5861 x 135070121.05. 16:23
r7s2sarm​v7l4 x 11,50072013.07. 02:16
r4s1arm​v7l4 x 11,50072021.05. 14:46
r1s5aarch​644 x 11,20079621.05. 14:00
r9s8sarm​v7l1 x 180079621.05. 17:01
r4s2arm​v7l1 x 180079621.05. 14:51
rfs4arm​v7l1 x 180080021.05. 06:23
rfs4sarm​v7l1 x 180080021.05. 06:30
ras3sarm​v7l1 x 11,30084021.05. 17:08
r7s8arm​v7l1 x 11,00099521.05. 16:18
r4s3i5861 x 150099621.05. 14:58
r3s7i6861 x 15331,06621.05. 14:42
r7s4sarm​v7l4 x 11,5001,08021.05. 16:13
r4s1sarm​v7l4 x 11,5001,08021.05. 14:49
r2s3sarm​v7l0 x 1 x 16001,20021.05. 14:12
r9s1sarm​v7l1 x 101,25014.04. 18:03
rfs6arm​v7l1 x 16671,33221.05. 06:37
rfs6sarm​v7l1 x 16671,33221.05. 06:38
res3saarch​640 x 1 x 11,0001,60021.05. 06:06
res6saarch​644 x 101,60021.05. 06:15
ras6sarm​v7l1 x 11,0001,98721.05. 17:11
r7s5i6861 x 11,3002,59321.05. 16:14
rbs8arm​v7l2 x 16662,65021.05. 17:36
ras1i6861 x 11,4002,79921.05. 17:05
r4s3si6861 x 11,4662,93221.05. 15:00
r6s5i6861 x 11,5002,99221.05. 15:55
r2s6i6861 x 11,5002,99921.05. 14:13
r6s6i6861 x 11,6003,19121.05. 15:57
ras6aarch​648 x 12,0003,20020.05. 17:01
r3s6x86_​641 x 11,6603,33321.05. 14:39
r9s4i6861 x 21,0003,99021.05. 16:48
r9s1x86_​642 x 12,0003,99221.05. 16:42
ras3aarch​648 x 12,0004,00021.05. 17:07
ras2x86_​642 x 11,0674,26621.05. 17:06
rcs4x86_​642 x 11,1004,37621.05. 17:53
r6s4x86_​642 x 11,1004,37621.05. 15:54
r8s8x86_​642 x 11,3005,14421.05. 16:39
rbs6sx86_​642 x 11,3335,33221.05. 17:30
r9s4sx86_​642 x 11,3335,34721.05. 16:55
rcs3i6862 x 11,4005,58621.05. 17:47
r1s8i6861 x 21,6006,39821.05. 14:05
r4s7sx86_​642 x 11,8337,33221.05. 15:14
r6s1x86_​642 x 12,0007,97821.05. 15:47
rcs4sx86_​644 x 11,1008,75221.05. 17:55
res6x86_​644 x 11,1008,75221.05. 06:13
r6s7i6862 x 12,3009,17611.01. 02:44
r6s2x86_​642 x 11,6679,57821.05. 15:50
rbs4x86_​644 x 11,2009,60021.05. 17:24
r9s5x86_​642 x 12,70010,77413.07. 03:15
r8s7x86_​642 x 12,70010,77621.05. 16:35
rcs5x86_​642 x 12,80011,19821.05. 17:56
rcs5sx86_​642 x 12,80011,19821.05. 17:59
rcs2x86_​642 x 12,80011,23221.05. 17:46
rcs7sx86_​644 x 11,50011,98021.05. 18:04
r9s2sx86_​644 x 11,60012,74830.08. 17:02
rds7x86_​644 x 11,60012,74821.05. 05:57
rds5x86_​644 x 11,60012,74821.05. 18:22
r9s3x86_​644 x 11,60012,74821.05. 16:46
r9s2x86_​644 x 11,60012,74821.05. 16:44
rds6x86_​644 x 11,60012,74821.05. 05:56
ras8sx86_​644 x 11,60012,74821.05. 17:15
rbs4sx86_​644 x 11,60012,74821.05. 17:25
rds8x86_​644 x 11,60012,74821.05. 05:58
r5s3sx86_​644 x 11,60012,74821.05. 15:24
r7s7x86_​644 x 11,60012,76721.05. 16:15
r7s1x86_​644 x 11,60012,84021.05. 16:03
r8s7sx86_​642 x 13,30013,19821.05. 16:37
r1s6sx86_​642 x 21,66713,33221.05. 14:02
r9s5sx86_​642 x 13,50013,99821.05. 16:56
rcs7x86_​642 x 21,80014,39621.05. 18:02
res1sx86_​644 x 11,60014,40021.05. 06:02
ras8x86_​644 x 11,60014,40021.05. 17:14
res2x86_​644 x 11,60014,40021.05. 06:03
res1x86_​644 x 11,60014,40021.05. 06:01
r4s7i6864 x 11,83314,66421.05. 15:12
res8sx86_​644 x 11,90015,05221.05. 06:19
res8x86_​644 x 11,90015,05221.05. 06:18
res4sx86_​644 x 11,90015,05221.05. 06:08
res4x86_​644 x 11,90015,05221.05. 06:07
r1s8sx86_​644 x 11,90015,19621.05. 14:07
rds3x86_​644 x 11,91015,32421.05. 18:19
rds4x86_​644 x 11,91015,32421.05. 18:21
rds2x86_​644 x 11,91015,32421.05. 18:18
rbs6x86_​644 x 11,91515,32421.05. 17:29
rds1x86_​644 x 11,91015,32421.05. 18:16
res3x86_​644 x 12,00015,97221.05. 06:04
rbs2x86_​644 x 12,00015,97221.05. 17:19
rbs1x86_​644 x 12,00015,97221.05. 17:17
r8s2x86_​642 x 22,10016,76021.05. 16:24
r8s2sx86_​642 x 22,10016,76021.05. 16:26
r1s6x86_​642 x 22,13017,06421.05. 14:01
r5s0x86_​642 x 22,20017,58221.05. 15:17
rbs0i6862 x 22,50017,60021.05. 17:16
r6s8x86_​642 x 22,30018,35621.05. 15:59
r4s0x86_​642 x 22,30018,39621.05. 14:45
r7s7sx86_​642 x 22,30018,39621.05. 16:16
r7s0x86_​642 x 22,30018,40021.05. 16:01
r9s0x86_​642 x 22,30018,40021.05. 16:40
r8s0x86_​642 x 22,30018,40021.05. 16:21
ras0x86_​642 x 22,30018,41621.05. 17:03
r3s1i6864 x 12,40019,12721.05. 14:22
res5sx86_​642 x 22,20019,20021.05. 06:11
res5x86_​642 x 22,20019,20021.05. 06:10
r5s4x86_​642 x 22,53020,26421.05. 15:26
r5s4sx86_​642 x 22,53020,26421.05. 15:27
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r8s3x86_​644 x 12,66721,28021.05. 16:27
r3s6sx86_​642 x 22,66721,33221.05. 14:41
r1s1x86_​642 x 22,60021,69621.05. 13:51
r5s2x86_​644 x 12,70021,69921.05. 15:20
r1s3x86_​644 x 12,80022,42421.05. 13:56
r9s6x86_​642 x 23,00023,94421.05. 16:58
r9s3sx86_​644 x 13,00024,00021.05. 16:47
r2s0x86_​644 x 13,10024,80021.05. 14:07
r1s0x86_​644 x 13,10024,80021.05. 13:50
r1s2sx86_​644 x 12,30028,00021.05. 13:55
r1s2x86_​644 x 12,30028,00021.05. 13:53
r8s4sx86_​644 x 21,60028,80021.05. 16:31
r8s4x86_​644 x 21,60028,80021.05. 16:29
r0s7sx86_​642 x 23,70029,52821.05. 13:44
r5s3x86_​644 x 22,00031,87221.05. 15:22
res0x86_​644 x 21,80031,99221.05. 06:00
rds0x86_​644 x 21,80031,99221.05. 18:15
r6s3x86_​644 x 22,20035,12021.05. 15:52
r3s8i6866 x 13,20038,52621.05. 14:43
rbs8sx86_​644 x 22,40038,70421.05. 17:37
r0s0x86_​644 x 22,50040,00021.05. 13:10
r5s1x86_​646 x 13,33340,09221.05. 15:19
rbs5i6864 x 2049,53921.05. 17:26
r0s1sx86_​644 x 23,30052,67221.05. 13:13
rcs3sx86_​644 x 23,30052,69621.05. 17:49
rcs8sx86_​644 x 23,30052,79221.05. 18:13
r4s6x86_​644 x 23,40054,25621.05. 15:06
r8s5i6864 x 23,40054,40021.05. 16:32
r0s2x86_​644 x 23,50055,86421.05. 13:15
r0s1x86_​644 x 22,30055,99221.05. 13:12
r3s0i6864 x 23,50055,99221.05. 14:20
r5s2sx86_​644 x 24,00063,86312.04. 01:34
rcs6x86_​644 x 23,50063,99221.05. 18:01
r0s3sx86_​644 x 23,60067,20021.05. 13:23
r0s2sx86_​6410 x 13,70073,99021.05. 13:16
rcs0x86_​648 x 22,40076,60021.05. 17:42
r3s3x86_​646 x 23,33379,99221.05. 14:27
rcs1x86_​646 x 23,46783,37621.05. 17:44
r0s8sx86_​646 x 23,47083,38821.05. 13:48
r0s6x86_​648 x 23,600115,20021.05. 13:34
r0s4sx86_​648 x 23,600115,20021.05. 13:26
r0s5sx86_​648 x 23,600115,20021.05. 13:30
r0s4x86_​648 x 23,600115,20021.05. 13:25
r0s7x86_​648 x 23,600115,20021.05. 13:39
r0s8x86_​648 x 23,600115,20021.05. 13:46
r0s3x86_​648 x 23,600115,20021.05. 13:18
r0s5x86_​648 x 23,500115,20021.05. 13:28
rfs0x86_​6416 x 22,000128,00021.05. 06:21
r6s0x86_​642 x 10 x 21,700136,18021.05. 15:46
r0s6sx86_​6410 x 23,700147,98021.05. 13:36
rcs8x86_​6416 x 23,700217,15221.05. 18:11
 

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