You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-18 - 22:46
OSADL Projects

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Number of cores/hyperthreads and bogoMIPS (x86 CPU strings, Intel names)

Box ↑ArchCoresMHzBogo​MIPSEffective
r0s0x86_​644 x 22,50039,99218.12. 13:10
r0s0sx86_​644 x 23,40054,39218.12. 13:10
r0s1x86_​644 x 22,30056,00018.12. 13:11
r0s1sx86_​644 x 23,30052,80018.12. 13:11
r0s2x86_​644 x 23,50055,86418.12. 13:11
r0s2sx86_​6410 x 13,70073,99018.12. 13:12
r0s3x86_​648 x 23,600115,20013.12. 01:13
r0s3sx86_​644 x 23,60067,20018.12. 13:13
r0s4x86_​648 x 23,600115,20018.12. 13:14
r0s4sx86_​648 x 23,600115,20018.12. 13:14
r0s5x86_​648 x 23,500115,20018.12. 13:15
r0s5sx86_​648 x 23,600115,20018.12. 13:16
r0s6x86_​648 x 23,600115,20018.12. 13:17
r0s6sx86_​6410 x 23,700147,98018.12. 13:19
r0s7x86_​648 x 23,600115,20018.12. 13:20
r0s7sx86_​642 x 23,70029,53223.05. 13:21
r0s8x86_​648 x 23,600115,20018.12. 13:21
r0s8sx86_​646 x 23,47083,37612.12. 01:22
r1s0x86_​644 x 13,10024,80018.12. 13:22
r1s1x86_​642 x 22,60021,69618.12. 13:23
r1s2x86_​644 x 12,30027,99618.12. 13:23
r1s2sx86_​644 x 12,30028,00018.12. 13:24
r1s3x86_​644 x 12,80022,42418.12. 13:25
r1s3sx86_​644 x 12,60020,88826.10. 13:42
r1s4arm​v7l2 x 11,2004812.12. 01:27
r1s4sarm​v7l2 x 14004812.12. 01:27
r1s5aarch​644 x 11,20079618.12. 13:25
r1s6x86_​642 x 22,13017,06418.12. 13:26
r1s6sx86_​642 x 21,66713,33218.12. 13:26
r1s7arm​v6l1 x 11,66753018.12. 13:27
r1s8i6861 x 21,6006,40018.12. 13:27
r1s8sx86_​644 x 11,90015,19618.12. 13:28
r2s0x86_​644 x 13,10024,79618.12. 13:28
r2s1arm​v5tejl1 x 120019918.12. 13:29
r2s2arm​v7l1 x 172049918.12. 13:29
r2s3arm​v7l0 x 1 x 162462418.12. 13:30
r2s3sarm​v7l0 x 2 x 16001,20012.12. 01:34
r2s4mips​641 x 180053129.09. 13:34
r2s5ppc1 x 13966618.12. 01:33
r2s5sarm​v7l4 x 11,20015212.12. 01:35
r2s6i6861 x 11,5002,99918.12. 13:31
r2s6saarch​644 x 11,3506418.12. 13:31
r2s7aarch​644 x 12,40043218.12. 13:32
r2s7saarch​644 x 11,50043218.12. 13:32
r2s8ppc1 x 14006612.12. 01:39
r3s0i6864 x 23,50055,99218.12. 13:33
r3s1i6864 x 12,40019,12818.12. 13:34
r3s2riscv641 x 11,00028418.12. 13:34
r3s2sriscv644 x 1028418.12. 13:35
r3s3x86_​646 x 23,33379,99218.12. 13:36
r3s3sx86_​644 x 13,40011,98018.12. 13:37
r3s4aarch​646 x 11,3009612.12. 01:44
r3s5i5861 x 113326518.12. 13:37
r3s5sppc2 x 11,20040018.12. 13:39
r3s6x86_​641 x 21,6606,66618.12. 13:40
r3s6sx86_​642 x 22,66721,33218.12. 13:40
r3s7i6861 x 15331,06618.12. 13:41
r3s8i6864 x 13,20027,37118.12. 13:42
r4s0x86_​642 x 22,30018,40018.12. 13:42
r4s1arm​v7l4 x 11,5001,08018.12. 13:43
r4s1sarm​v7l4 x 11,50086418.12. 13:44
r4s2arm​v7l1 x 180079612.12. 01:53
r4s2sarm​v7l1 x 180053018.12. 13:44
r4s3i5861 x 150099618.12. 13:46
r4s3si6861 x 11,4662,93228.07. 02:17
r4s4ppc4 x 11,20049818.12. 13:48
r4s5arm​v7l1 x 1500018.12. 13:51
r4s5saarch​644 x 11,60020012.12. 02:02
r4s6x86_​644 x 23,40054,25618.12. 13:51
r4s6sarm​v7l0 x 1 x 11,0006618.12. 13:52
r4s7i6864 x 11,83314,66418.12. 13:53
r4s7sx86_​642 x 11,8337,33218.12. 13:53
r4s8arm​v7l1 x 140039818.12. 13:54
r4s8sarm​v7l1 x 140039818.12. 13:54
r5s0x86_​642 x 22,20017,58218.12. 13:55
r5s1x86_​646 x 13,33340,00218.12. 13:55
r5s2x86_​644 x 12,70021,69918.12. 13:56
r5s2sx86_​644 x 24,00063,86312.04. 01:34
r5s3x86_​644 x 22,00031,87218.12. 13:56
r5s3sx86_​644 x 11,60012,74818.12. 13:57
r5s4x86_​642 x 22,53020,26418.12. 13:58
r5s4sx86_​644 x 11,60012,74818.12. 13:58
r5s5arm​v7l1 x 160059712.12. 02:12
r5s5sarm​v7l1 x 160060017.12. 13:55
r5s6ppc1 x 153313318.12. 14:00
r5s7arm​v7l1 x 15286412.12. 02:17
r5s7sarm​v7l1 x 15284812.12. 02:19
r5s8x86_​644 x 12,00015,97212.12. 02:20
r6s0x86_​642 x 10 x 21,700136,14018.12. 14:00
r6s1x86_​642 x 12,0007,97812.12. 02:21
r6s2x86_​642 x 11,6679,57812.12. 02:22
r6s3x86_​644 x 22,20035,12018.12. 14:01
r6s4x86_​642 x 11,1004,37618.12. 14:02
r6s5i6861 x 11,5002,99218.12. 14:02
r6s6i6861 x 11,6003,19218.12. 14:03
r6s7i6862 x 12,3009,17618.12. 14:04
r6s8x86_​642 x 22,30018,35618.12. 14:04
r7s0x86_​642 x 22,30018,40018.12. 14:05
r7s1x86_​644 x 11,60012,83912.12. 02:27
r7s2aarch​642 x 11,7009618.12. 14:05
r7s2sriscv644 x 1028412.12. 02:29
r7s3arm​v6l1 x 1700518.12. 14:06
r7s3sarm​v7l4 x 11,40035618.12. 14:08
r7s4arm​v7l1 x 153634818.12. 14:08
r7s4sarm​v7l4 x 11,5001,08012.12. 02:34
r7s5i6861 x 11,3002,59312.12. 02:34
r7s6arm​v7l1 x 11,00039828.02. 14:10
r7s7x86_​644 x 11,60012,76718.12. 14:09
r7s7sx86_​642 x 22,30018,39618.12. 14:10
r7s8arm​v7l1 x 11,00099518.12. 14:10
r7s8sarm​v7l1 x 11,00099612.12. 02:37
r8s0x86_​642 x 22,30018,40018.12. 14:11
r8s1i5861 x 135070118.12. 14:12
r8s3x86_​644 x 12,66721,28018.12. 14:13
r8s4x86_​644 x 21,60028,80018.12. 14:13
r8s4sx86_​644 x 21,60028,80018.12. 14:14
r8s5i6864 x 23,40054,40018.12. 14:15
r8s6arm​v7l1 x 150049818.12. 14:15
r8s6sx86_​644 x 13,30026,41618.12. 14:15
r8s7x86_​644 x 13,20025,49618.12. 14:16
r8s7sx86_​642 x 13,00011,98012.12. 02:43
r8s8x86_​642 x 11,3005,14418.12. 14:17
r9s0x86_​644 x 23,60057,60018.12. 14:17
r9s1x86_​642 x 12,0003,99212.12. 02:46
r9s1sarm​v7l1 x 101,25014.04. 18:03
r9s2x86_​644 x 11,60012,74818.12. 14:18
r9s2sx86_​644 x 11,60012,74830.08. 17:02
r9s3x86_​644 x 11,60012,74818.12. 14:19
r9s3sx86_​644 x 13,00024,00018.12. 14:20
r9s4i6861 x 21,0003,99018.12. 14:20
r9s4sx86_​642 x 11,3335,34718.12. 14:21
r9s5x86_​642 x 12,70010,77413.07. 03:15
r9s5sx86_​642 x 13,30013,19818.12. 14:21
r9s6x86_​642 x 23,00023,94418.12. 14:22
r9s7arm​v7l2 x 11,000012.12. 02:51
r9s8sarm​v7l1 x 180079612.12. 02:52
ras0x86_​642 x 22,30018,41818.12. 14:23
ras1i6861 x 11,4002,79918.12. 14:23
ras2x86_​642 x 11,0674,26618.12. 14:24
ras2sx86_​644 x 11,90015,05218.12. 14:25
ras3aarch​648 x 12,0004,00006.05. 03:01
ras3sarm​v7l1 x 11,30084018.12. 14:25
ras4aarch​648 x 12,40038418.12. 14:26
ras4saarch​648 x 12,40038429.09. 03:02
ras5arm​v7l2 x 11,0002412.12. 02:56
ras5sarm​v7l2 x 11,0002412.12. 02:56
ras6aarch​648 x 12,0003,20012.12. 02:57
ras6sarm​v7l1 x 11,0001,98712.12. 02:57
ras7ppc1 x 13966518.12. 14:27
ras8x86_​644 x 11,60014,40018.12. 14:27
ras8sx86_​644 x 11,60012,74818.12. 14:28
rbs0i6862 x 22,50017,60018.12. 14:28
rbs1x86_​644 x 12,00015,97218.12. 14:29
rbs2x86_​644 x 12,00015,97218.12. 14:29
rbs2sx86_​641 x 13,500007.09. 15:06
rbs3arm​v7l4 x 19962412.12. 03:02
rbs3sarm​v7l4 x 11,40035618.12. 14:30
rbs4x86_​644 x 11,2009,60018.12. 14:31
rbs4sx86_​644 x 11,60012,74818.12. 14:31
rbs5i6864 x 2049,66018.12. 14:32
rbs5saarch​644 x 11,6006418.12. 14:32
rbs6x86_​644 x 11,91515,32418.12. 14:33
rbs6sx86_​642 x 11,3335,33229.08. 03:00
rbs7arm​v7l4 x 19961218.12. 14:34
rbs7sarm​v7l4 x 19962418.12. 14:35
rbs8arm​v7l2 x 16662,65018.12. 14:35
rbs8sx86_​644 x 22,40038,70418.12. 14:36
rcs0x86_​648 x 22,40076,40018.12. 14:37
rcs1x86_​646 x 23,46783,37618.12. 14:38
rcs2x86_​642 x 12,80011,23218.12. 14:38
rcs3i6862 x 11,4005,58618.12. 14:39
rcs3sx86_​644 x 13,30026,39618.12. 14:40
rcs4x86_​642 x 11,1004,37618.12. 14:40
rcs5x86_​642 x 12,80011,19818.12. 14:41
rcs5sx86_​642 x 12,80011,19818.12. 14:42
rcs6x86_​644 x 23,50063,99218.12. 14:43
rcs7x86_​642 x 21,80014,39618.12. 14:44
rcs7sx86_​644 x 11,50011,98018.12. 14:45
rcs8x86_​6416 x 23,700217,18418.12. 14:48
rcs8sx86_​644 x 23,30052,80018.12. 14:49
rds0x86_​644 x 21,80031,99218.12. 14:49
rds1x86_​644 x 11,60012,74818.12. 14:50
rds2x86_​644 x 11,60012,74818.12. 14:51
rds3x86_​644 x 11,60012,74818.12. 14:51
rds4x86_​644 x 11,60012,74818.12. 14:52
rds5x86_​644 x 11,60012,74818.12. 14:52
rds6x86_​644 x 11,60012,74818.12. 14:53
rds7x86_​644 x 11,60012,74818.12. 14:53
rds8x86_​644 x 11,60012,74818.12. 14:54
res0x86_​644 x 23,40054,39218.12. 14:54
res1x86_​644 x 11,60014,40018.12. 14:56
res1sx86_​644 x 11,60014,40018.12. 14:56
res2x86_​644 x 11,60014,40018.12. 14:56
res3x86_​644 x 12,00015,97218.12. 14:57
res3saarch​640 x 1 x 11,0001,60018.12. 14:57
res4x86_​644 x 11,90015,05218.12. 14:58
res4sx86_​644 x 11,90015,05218.12. 14:59
res5x86_​642 x 22,20019,20018.12. 14:59
res5sx86_​642 x 22,20019,20018.12. 15:00
res6x86_​644 x 11,1008,75218.12. 15:00
res6saarch​644 x 101,60018.12. 15:01
res7arm​v7l0 x 1 x 11,0001218.12. 15:02
res7sarm​v7l0 x 1 x 11,0001218.12. 15:02
res8x86_​644 x 11,90015,05218.12. 15:03
res8sx86_​644 x 11,90015,05218.12. 15:04
rfs0x86_​6416 x 22,000128,00018.12. 15:04
rfs1aarch​644 x 11,50043218.12. 15:05
rfs1saarch​644 x 11,50043218.12. 15:05
rfs2x86_​644 x 13,00024,00018.12. 15:05
rfs2sx86_​642 x 13,00011,99818.12. 15:06
rfs3x86_​644 x 11,60012,74818.12. 15:06
rfs3sx86_​644 x 11,60012,74818.12. 15:06
rfs4aarch​641 x 11,4001,60018.12. 15:07
rfs4sarm​v7l1 x 180080018.12. 15:08
rfs5aarch​644 x 11,2006418.12. 15:10
rfs5saarch​644 x 11,2006427.08. 03:49
rfs6arm​v7l1 x 16671,33218.12. 15:11
rfs6sarm​v7l1 x 16671,33218.12. 15:12
rfs7x86_​644 x 22,60041,60018.12. 15:12
rfs7sx86_​644 x 17006,44818.12. 15:13
rfs8arm​v7l1 x 11,00012004.03. 03:47
 

Valid XHTML 1.0 Transitional