You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-24 - 05:27
OSADL Projects

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Number of cores/hyperthreads and bogoMIPS (x86 CPU strings, Intel names)

Box ↑ArchCoresMHzBogo​MIPSEffective
r0s0x86_​644 x 22,50039,99224.09. 01:10
r0s0sx86_​644 x 23,40054,39224.09. 01:10
r0s1x86_​644 x 22,30056,00024.09. 01:11
r0s1sx86_​644 x 23,30052,80024.09. 01:12
r0s2x86_​644 x 23,50055,86424.09. 01:13
r0s2sx86_​6410 x 13,70073,99024.09. 01:13
r0s3x86_​648 x 23,600115,20024.09. 01:14
r0s3sx86_​644 x 23,60067,20024.09. 01:16
r0s4x86_​648 x 23,600115,20024.09. 01:16
r0s4sx86_​648 x 23,600115,20024.09. 01:17
r0s5x86_​648 x 23,500115,20024.09. 01:18
r0s5sx86_​648 x 23,600115,20024.09. 01:18
r0s6x86_​648 x 23,600115,20024.09. 01:19
r0s6sx86_​6410 x 23,700147,98024.09. 01:20
r0s7x86_​6410 x 13,70073,99024.09. 01:21
r0s7sx86_​642 x 23,70029,53223.05. 13:21
r0s8x86_​648 x 23,600115,20014.03. 13:20
r0s8sx86_​646 x 23,47083,38824.09. 01:21
r1s0x86_​644 x 13,10024,80024.09. 01:22
r1s1x86_​642 x 22,60021,69624.09. 01:22
r1s2x86_​644 x 12,30027,99624.09. 01:23
r1s2sx86_​644 x 12,30028,00024.09. 01:24
r1s3x86_​644 x 12,80022,42424.09. 01:24
r1s3saarch​646 x 12,00028824.09. 01:25
r1s4arm​v7l2 x 11,2004824.09. 01:26
r1s4sarm​v7l2 x 14004824.09. 01:26
r1s5aarch​644 x 11,20079624.09. 01:27
r1s6x86_​642 x 22,13017,06424.09. 01:27
r1s6sx86_​642 x 21,66713,33224.09. 01:27
r1s7arm​v6l1 x 11,66753024.09. 01:28
r1s8i6861 x 21,6006,40024.09. 01:29
r1s8sx86_​644 x 11,90015,19624.09. 01:29
r2s0x86_​644 x 13,60024,79624.09. 01:30
r2s1arm​v5tejl1 x 120019924.09. 01:30
r2s2arm​v7l1 x 172049924.09. 01:31
r2s3arm​v7l0 x 1 x 162462424.09. 01:31
r2s3sarm​v7l0 x 2 x 16001,20024.09. 01:33
r2s4mips​641 x 180053129.09. 13:34
r2s5ppc1 x 13966626.07. 13:34
r2s5sarm​v7l4 x 11,20015224.09. 01:34
r2s6i6861 x 11,5002,99924.09. 01:35
r2s6saarch​644 x 11,3506424.09. 01:35
r2s7aarch​644 x 12,40043224.09. 01:36
r2s7saarch​644 x 11,50043224.09. 01:36
r2s8ppc1 x 14006624.09. 01:38
r3s0i6864 x 23,50055,99224.09. 01:38
r3s1i6864 x 12,40019,12824.09. 01:39
r3s2riscv641 x 11,00028424.09. 01:40
r3s2sriscv644 x 1028424.09. 01:41
r3s3x86_​646 x 23,33379,99224.09. 01:41
r3s3sx86_​644 x 13,40011,98024.09. 01:42
r3s4aarch​646 x 11,3009624.09. 01:42
r3s5i5861 x 113326524.09. 01:43
r3s5sppc2 x 11,20040024.09. 01:45
r3s6x86_​641 x 21,6606,66624.09. 01:45
r3s6sx86_​642 x 22,66721,33224.09. 01:46
r3s7i6861 x 15331,06624.09. 01:47
r4s0x86_​642 x 22,30018,39624.09. 01:48
r4s1aarch​644 x 11,50043224.09. 01:48
r4s1sarm​v7l4 x 11,50086424.09. 01:49
r4s2arm​v7l1 x 180079624.09. 01:50
r4s2sarm​v7l1 x 180053024.09. 01:51
r4s3i5861 x 150099624.09. 01:53
r4s3si6861 x 11,4662,93228.07. 02:17
r4s4ppc4 x 11,20049824.09. 01:54
r4s5arm​v7l1 x 1500024.09. 01:58
r4s5saarch​644 x 11,60020024.09. 01:58
r4s6x86_​644 x 23,40054,25624.09. 01:58
r4s6sarm​v7l0 x 1 x 11,0006624.09. 02:00
r4s7i6864 x 11,83314,66424.09. 02:01
r4s7sx86_​642 x 11,8337,33224.09. 02:01
r4s8arm​v7l1 x 140039824.09. 02:02
r4s8sarm​v7l1 x 140039824.09. 02:03
r5s0x86_​642 x 22,20017,58424.09. 02:03
r5s1x86_​646 x 13,33340,08624.09. 02:04
r5s2x86_​644 x 12,70021,69924.09. 02:04
r5s2sx86_​6410 x 14,80049,92024.09. 02:05
r5s3x86_​644 x 22,00031,87224.09. 02:06
r5s3sx86_​644 x 11,60012,74824.09. 02:06
r5s4x86_​642 x 22,53020,26424.09. 02:08
r5s4sx86_​644 x 11,60012,74824.09. 02:09
r5s5arm​v7l1 x 160059724.09. 02:10
r5s5sarm​v7l1 x 160060024.09. 02:13
r5s6ppc1 x 153313324.09. 02:17
r5s7arm​v7l1 x 15286424.09. 02:17
r5s7sarm​v7l1 x 15286424.09. 02:18
r5s8x86_​644 x 12,00015,97224.09. 02:20
r6s0x86_​642 x 10 x 21,700136,14024.09. 02:20
r6s1x86_​642 x 12,0007,97812.12. 02:21
r6s2x86_​642 x 11,6679,57824.09. 02:21
r6s3x86_​644 x 22,20035,12024.09. 02:21
r6s4x86_​642 x 11,1004,37624.09. 02:22
r6s5i6861 x 11,5002,99224.09. 02:23
r6s6i6861 x 11,6003,19224.09. 02:24
r6s7i6862 x 12,3009,17624.09. 02:24
r6s8x86_​642 x 22,30018,35624.09. 02:25
r7s0x86_​642 x 22,30018,40024.09. 02:26
r7s1x86_​644 x 11,60012,83924.09. 02:26
r7s2aarch​642 x 11,7009624.09. 02:26
r7s2sriscv644 x 1028425.08. 02:21
r7s3arm​v6l1 x 1700524.09. 02:28
r7s3sarm​v7l4 x 11,40035624.09. 02:29
r7s4arm​v7l1 x 153634824.09. 02:30
r7s4sarm​v7l4 x 11,5001,08024.09. 02:31
r7s5i6861 x 11,3002,59324.09. 02:32
r7s6arm​v7l1 x 11,00039824.09. 02:33
r7s7x86_​644 x 11,60012,76724.09. 02:34
r7s7sx86_​642 x 22,30018,39624.09. 02:34
r7s8arm​v7l1 x 11,00099524.09. 02:35
r7s8sarm​v7l1 x 11,00079624.09. 02:37
r8s0x86_​642 x 22,30018,40024.09. 02:37
r8s1i5861 x 135070124.09. 02:38
r8s2aarch​644 x 11,4001,60024.09. 02:39
r8s2saarch​644 x 11,4001,60024.09. 02:40
r8s3x86_​644 x 12,66721,28024.09. 02:42
r8s4x86_​644 x 21,60028,80024.09. 02:43
r8s4sx86_​644 x 21,60028,80024.09. 02:43
r8s5i6864 x 23,40054,40024.09. 02:43
r8s6arm​v7l1 x 150049824.09. 02:44
r8s6sx86_​644 x 13,30026,41624.09. 02:44
r8s7x86_​644 x 13,20025,49624.09. 02:45
r8s7sx86_​642 x 13,00011,98024.09. 02:46
r8s8x86_​642 x 11,3005,14424.09. 02:46
r9s0x86_​644 x 23,60057,60024.09. 02:48
r9s1x86_​642 x 12,0007,98412.02. 14:30
r9s1sarm​v7l1 x 101,25014.04. 18:03
r9s2arm​v7l0 x 1 x 155040024.09. 02:49
r9s2sarm​v7l0 x 1 x 155040024.09. 02:49
r9s3x86_​644 x 11,60012,74824.09. 02:50
r9s3sx86_​644 x 13,00024,00024.09. 02:51
r9s4i6861 x 21,0003,99024.09. 02:51
r9s4sx86_​642 x 11,3335,34724.09. 02:52
r9s5x86_​644 x 21,90028,80024.09. 02:52
r9s5sx86_​642 x 13,30013,19824.09. 02:53
r9s6x86_​642 x 23,00023,94424.09. 02:53
r9s7arm​v7l2 x 11,000009.09. 02:43
r9s8aarch​644 x 11,50043224.09. 02:54
r9s8sriscv644 x 1028424.09. 02:54
ras0x86_​642 x 22,30018,41824.09. 02:55
ras1i6861 x 11,4002,79924.09. 02:56
ras2x86_​642 x 11,0674,26624.09. 02:56
ras2sx86_​644 x 11,90015,05230.07. 14:50
ras3aarch​648 x 12,0004,00006.05. 03:01
ras3sarm​v7l1 x 11,30084024.09. 03:04
ras4aarch​648 x 12,40038424.09. 03:05
ras4saarch​648 x 12,40038429.09. 03:02
ras5arm​v7l2 x 11,0002424.09. 03:06
ras5sarm​v7l2 x 11,0002424.09. 03:06
ras6aarch​648 x 12,0003,20024.09. 03:06
ras6sarm​v7l1 x 11,0001,98724.09. 03:08
ras7ppc1 x 13966524.09. 03:08
ras8x86_​644 x 11,60014,40024.09. 03:08
ras8sx86_​644 x 11,60012,74824.09. 03:09
rbs0i6862 x 22,50017,60024.09. 03:09
rbs2sx86_​6414 x 14,80055,90224.09. 03:10
rbs3arm​v7l4 x 19962424.09. 03:11
rbs3sarm​v7l4 x 11,40035624.09. 03:11
rbs4x86_​644 x 11,2009,60024.09. 03:12
rbs4sx86_​644 x 11,60012,74824.09. 03:13
rbs5i6864 x 2052,36524.09. 03:13
rbs5saarch​644 x 11,6006424.09. 03:13
rbs6x86_​644 x 11,91515,32424.09. 03:14
rbs6sx86_​642 x 11,3335,33229.08. 03:00
rbs7arm​v7l4 x 19961224.09. 03:15
rbs7sarm​v7l4 x 19962424.09. 03:17
rbs8arm​v7l2 x 16662,65024.09. 03:18
rbs8sx86_​644 x 22,40038,70424.09. 03:18
rcs0x86_​648 x 22,40076,59224.09. 03:20
rcs1x86_​646 x 23,46783,37724.09. 03:21
rcs2x86_​642 x 12,80011,23224.09. 03:21
rcs3i6862 x 11,4005,58824.09. 03:22
rcs3sx86_​644 x 13,30026,39624.09. 03:22
rcs4x86_​642 x 11,1004,37624.09. 03:23
rcs5x86_​642 x 12,80011,19824.09. 03:25
rcs5sx86_​642 x 12,80011,19824.09. 03:26
rcs6x86_​644 x 23,50063,99224.09. 03:26
rcs7x86_​642 x 21,80014,40024.09. 03:27
rcs7sx86_​644 x 11,50011,98024.09. 03:28
rcs8x86_​6416 x 23,700217,18424.09. 03:31
rcs8sx86_​644 x 23,30052,80024.09. 03:32
rds0x86_​644 x 21,80031,99224.09. 03:33
rds1x86_​644 x 11,60012,74824.09. 03:33
rds2x86_​644 x 11,60012,74824.09. 03:34
rds3x86_​644 x 11,60012,74824.09. 03:35
rds4x86_​644 x 11,60012,74824.09. 03:35
rds5x86_​644 x 11,60012,74824.09. 03:36
rds6x86_​644 x 11,60012,74824.09. 03:36
rds7x86_​644 x 11,60012,74824.09. 03:37
rds8x86_​644 x 11,60012,74824.09. 03:38
res0x86_​644 x 23,40054,39224.09. 03:39
res1x86_​644 x 11,60014,40024.09. 03:40
res1sx86_​644 x 11,60014,40024.09. 03:40
res2x86_​644 x 11,60014,40024.09. 03:41
res3x86_​644 x 12,00015,97224.09. 03:41
res3saarch​640 x 1 x 11,0001,60024.09. 03:42
res4x86_​644 x 11,90015,05224.09. 03:42
res4sx86_​644 x 11,90015,05224.09. 03:43
res5x86_​642 x 22,20019,20024.09. 03:44
res5sx86_​642 x 22,20019,20024.09. 03:44
res6x86_​644 x 11,1008,75224.09. 03:45
res6saarch​644 x 101,60024.09. 03:46
res7arm​v7l0 x 1 x 11,0001224.09. 03:47
res7sarm​v7l0 x 1 x 11,0001224.09. 03:47
res8x86_​644 x 11,90015,05224.09. 03:48
res8sx86_​644 x 11,90015,05224.09. 03:48
rfs0x86_​6416 x 22,000128,00024.09. 03:49
rfs1aarch​644 x 11,50043224.09. 03:50
rfs1saarch​644 x 11,50043224.09. 03:50
rfs2x86_​644 x 13,00024,00024.09. 03:50
rfs2sx86_​642 x 13,00011,99824.09. 03:51
rfs3x86_​644 x 11,60012,74824.09. 03:51
rfs3sx86_​644 x 11,60012,74824.09. 03:52
rfs4aarch​641 x 11,4001,60024.09. 03:52
rfs4sarm​v7l1 x 180080024.09. 03:53
rfs5aarch​644 x 11,2006424.09. 03:54
rfs5saarch​644 x 11,2006424.09. 03:55
rfs6arm​v7l1 x 16671,33224.09. 03:56
rfs6sarm​v7l1 x 16671,33224.09. 03:56
rfs7x86_​644 x 22,60041,60024.09. 03:57
rfs7sx86_​644 x 17006,44824.09. 03:58
rfs8arm​v7l1 x 11,00012024.09. 03:58
 

Valid XHTML 1.0 Transitional