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2026-04-15 - 11:51
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OSADL QA Farm on Real-time of Mainline Linux

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Number of cores/hyperthreads and bogoMIPS (x86 CPU strings, Intel names)

Box ↑ArchCoresMHzBogo​MIPSEffective
r0s0x86_​644 x 22,50039,99215.04. 01:10
r0s0sx86_​644 x 23,40054,39215.04. 01:10
r0s1x86_​644 x 22,30056,00015.04. 01:11
r0s1sx86_​644 x 23,30052,80015.04. 01:11
r0s2x86_​644 x 23,50055,87215.04. 01:11
r0s2sx86_​6410 x 13,70073,99015.04. 01:12
r0s3x86_​648 x 23,600115,20015.04. 01:12
r0s3sx86_​644 x 23,60067,20015.04. 01:13
r0s4x86_​648 x 23,600115,20015.04. 01:14
r0s4sx86_​648 x 23,600115,20015.04. 01:15
r0s5x86_​648 x 23,500115,20015.04. 01:15
r0s5sx86_​648 x 23,600115,20015.04. 01:16
r0s6x86_​648 x 23,600115,20015.04. 01:17
r0s6sx86_​6410 x 23,700147,98015.04. 01:17
r0s7x86_​648 x 23,600115,20006.01. 13:20
r0s7sx86_​642 x 23,70029,53223.05. 13:21
r0s8x86_​648 x 23,600115,20014.03. 13:20
r0s8sx86_​646 x 23,47083,38815.04. 01:18
r1s0x86_​644 x 13,10024,80015.04. 01:19
r1s1x86_​642 x 22,60021,69615.04. 01:20
r1s2x86_​644 x 12,30027,99615.04. 01:20
r1s2sx86_​644 x 12,30028,00015.04. 01:21
r1s3x86_​644 x 12,80022,42415.04. 01:21
r1s4arm​v7l2 x 11,2004815.04. 01:22
r1s4sarm​v7l2 x 14004815.04. 01:22
r1s5aarch​644 x 11,20079615.04. 01:23
r1s6x86_​642 x 22,13017,06415.04. 01:23
r1s6sx86_​642 x 21,66713,33215.04. 01:24
r1s7arm​v6l1 x 11,66753015.04. 01:25
r1s8i6861 x 21,6006,40015.04. 01:25
r1s8sx86_​644 x 11,90015,19615.04. 01:26
r2s0x86_​644 x 13,10024,79615.04. 01:26
r2s1arm​v5tejl1 x 120019915.04. 01:27
r2s2arm​v7l1 x 172049915.04. 01:27
r2s3arm​v7l0 x 1 x 162462415.04. 01:27
r2s3sarm​v7l0 x 2 x 16001,20015.04. 01:28
r2s4mips​641 x 180053129.09. 13:34
r2s5ppc1 x 13966625.12. 13:33
r2s5sarm​v7l4 x 11,20015212.12. 01:35
r2s6i6861 x 11,5002,99915.04. 01:29
r2s6saarch​644 x 11,3506415.04. 01:30
r2s7aarch​644 x 12,40043215.04. 01:30
r2s7saarch​644 x 11,50043215.04. 01:31
r2s8ppc1 x 14006615.04. 01:32
r3s0i6864 x 23,50055,99215.04. 01:32
r3s1i6864 x 12,40019,12815.04. 01:33
r3s2riscv641 x 11,00028415.04. 01:33
r3s2sriscv644 x 1028415.04. 01:34
r3s3x86_​646 x 23,33379,99215.04. 01:35
r3s3sx86_​644 x 13,40011,98015.04. 01:35
r3s4aarch​646 x 11,3009615.04. 01:36
r3s5i5861 x 113326515.04. 01:37
r3s5sppc2 x 11,20040014.04. 01:39
r3s6x86_​641 x 21,6606,66615.04. 01:38
r3s6sx86_​642 x 22,66721,33215.04. 01:39
r3s7i6861 x 15331,06615.04. 01:40
r4s0x86_​642 x 22,30018,40015.04. 01:41
r4s1arm​v7l4 x 11,50079215.04. 01:41
r4s1sarm​v7l4 x 11,5001,00815.04. 01:42
r4s2arm​v7l1 x 180079615.04. 01:43
r4s2sarm​v7l1 x 180053015.04. 01:44
r4s3i5861 x 150099615.04. 01:46
r4s3si6861 x 11,4662,93228.07. 02:17
r4s4ppc4 x 11,20049815.04. 01:47
r4s5arm​v7l1 x 1500015.04. 01:51
r4s5saarch​644 x 11,60020015.04. 01:51
r4s6x86_​644 x 23,40054,25615.04. 01:51
r4s6sarm​v7l0 x 1 x 11,0006615.04. 01:52
r4s7i6864 x 11,83314,66415.04. 01:53
r4s7sx86_​642 x 11,8337,33215.04. 01:53
r4s8arm​v7l1 x 140039815.04. 01:54
r4s8sarm​v7l1 x 140039815.04. 01:54
r5s0x86_​642 x 22,20017,58415.04. 01:55
r5s1x86_​646 x 13,33340,08615.04. 01:55
r5s2x86_​644 x 12,70021,69915.04. 01:56
r5s2sx86_​644 x 24,00063,86312.04. 01:34
r5s3x86_​644 x 22,00031,87215.04. 01:56
r5s3sx86_​644 x 11,60012,74815.04. 01:57
r5s4x86_​642 x 22,53020,26415.04. 01:58
r5s4sx86_​644 x 11,60012,74815.04. 01:58
r5s5arm​v7l1 x 160059715.04. 02:00
r5s5sarm​v7l1 x 160060015.04. 02:03
r5s6ppc1 x 153313315.04. 02:06
r5s7arm​v7l1 x 15286415.04. 02:07
r5s7sarm​v7l1 x 15284815.04. 02:08
r5s8x86_​644 x 12,00015,97215.04. 02:10
r6s0x86_​642 x 10 x 21,700136,14015.04. 02:10
r6s1x86_​642 x 12,0007,97812.12. 02:21
r6s2x86_​642 x 11,6679,57815.04. 02:11
r6s3x86_​644 x 22,20035,12015.04. 02:11
r6s4x86_​642 x 11,1004,37615.04. 02:12
r6s5i6861 x 11,5002,99215.04. 02:12
r6s6i6861 x 11,6003,19215.04. 02:14
r6s7i6862 x 12,3009,17615.04. 02:14
r6s8x86_​642 x 22,30018,35615.04. 02:15
r7s0x86_​642 x 22,30018,40015.04. 02:15
r7s1x86_​644 x 11,60012,83915.04. 02:16
r7s2aarch​642 x 11,7009615.04. 02:16
r7s2sriscv644 x 1028415.04. 02:17
r7s3arm​v6l1 x 1700515.04. 02:18
r7s3sarm​v7l4 x 11,40035615.04. 02:19
r7s4arm​v7l1 x 153634815.04. 02:20
r7s4sarm​v7l4 x 11,5001,08015.04. 02:21
r7s5i6861 x 11,3002,59315.04. 02:21
r7s7x86_​644 x 11,60012,76715.04. 02:22
r7s7sx86_​642 x 22,30018,39615.04. 02:23
r7s8arm​v7l1 x 11,00099515.04. 02:23
r7s8sarm​v7l1 x 11,00079615.04. 02:24
r8s0x86_​642 x 22,30018,40015.04. 02:25
r8s1i5861 x 135070115.04. 02:26
r8s2aarch​644 x 11,5001,60015.04. 02:27
r8s2saarch​644 x 11,5001,60015.04. 02:27
r8s3x86_​644 x 12,66721,28015.04. 02:28
r8s4x86_​644 x 21,60028,80015.04. 02:28
r8s4sx86_​644 x 21,60028,80015.04. 02:29
r8s5i6864 x 23,40054,40015.04. 02:30
r8s6arm​v7l1 x 150049815.04. 02:30
r8s6sx86_​644 x 13,30026,41615.04. 02:31
r8s7x86_​644 x 13,20025,49615.04. 02:31
r8s7sx86_​642 x 13,00011,98015.04. 02:32
r8s8x86_​642 x 11,3005,14415.04. 02:32
r9s0x86_​644 x 23,60057,60015.04. 02:33
r9s1x86_​642 x 12,0007,98412.02. 14:30
r9s1sarm​v7l1 x 101,25014.04. 18:03
r9s2x86_​644 x 11,60012,74815.04. 02:34
r9s2sx86_​644 x 11,60012,74830.08. 17:02
r9s3x86_​644 x 11,60012,74815.04. 02:35
r9s3sx86_​644 x 13,00024,00015.04. 02:35
r9s4i6861 x 21,0003,99015.04. 02:36
r9s4sx86_​642 x 11,3335,34715.04. 02:36
r9s5sx86_​642 x 13,30013,19815.04. 02:37
r9s6x86_​642 x 23,00023,94415.04. 02:38
r9s7arm​v7l2 x 11,000015.04. 02:38
r9s8sarm​v7l1 x 180079615.04. 02:39
ras0x86_​642 x 22,30018,41815.04. 02:40
ras1i6861 x 11,4002,79915.04. 02:40
ras2x86_​642 x 11,0674,26615.04. 02:41
ras2sx86_​644 x 11,90015,05215.04. 02:41
ras3aarch​648 x 12,0004,00006.05. 03:01
ras3sarm​v7l1 x 11,30084015.04. 02:41
ras4aarch​648 x 12,40038415.04. 02:42
ras4saarch​648 x 12,40038429.09. 03:02
ras5arm​v7l2 x 11,0002415.04. 02:42
ras5sarm​v7l2 x 11,0002415.04. 02:43
ras6aarch​648 x 12,0003,20015.04. 02:43
ras6sarm​v7l1 x 11,0001,98715.04. 02:44
ras7ppc1 x 13966515.04. 02:45
ras8x86_​644 x 11,60014,40015.04. 02:45
ras8sx86_​644 x 11,60012,74815.04. 02:45
rbs0i6862 x 22,50017,60015.04. 02:46
rbs3arm​v7l4 x 19962415.04. 02:46
rbs3sarm​v7l4 x 11,40035615.04. 02:47
rbs4x86_​644 x 11,2009,60015.04. 02:48
rbs4sx86_​644 x 11,60012,74815.04. 02:48
rbs5i6864 x 2052,36515.04. 02:49
rbs5saarch​644 x 11,6006415.04. 02:49
rbs6x86_​644 x 11,91515,32415.04. 02:50
rbs6sx86_​642 x 11,3335,33229.08. 03:00
rbs7arm​v7l4 x 19961215.04. 02:51
rbs7sarm​v7l4 x 19962415.04. 02:52
rbs8arm​v7l2 x 16662,65015.04. 02:53
rbs8sx86_​644 x 22,40038,70415.04. 02:54
rcs0x86_​648 x 22,40076,40015.04. 02:55
rcs1x86_​646 x 23,46783,37615.04. 02:56
rcs2x86_​642 x 12,80011,23215.04. 02:57
rcs3i6862 x 11,4005,58615.04. 02:57
rcs3sx86_​644 x 13,30026,39615.04. 02:58
rcs4x86_​642 x 11,1004,37615.04. 02:59
rcs5x86_​642 x 12,80011,19815.04. 03:00
rcs5sx86_​642 x 12,80011,19815.04. 03:01
rcs6x86_​644 x 23,50063,99215.04. 03:02
rcs7x86_​642 x 21,80014,40015.04. 03:03
rcs7sx86_​644 x 11,50011,98015.04. 03:04
rcs8x86_​6416 x 23,700217,18414.04. 15:14
rcs8sx86_​644 x 23,30052,80015.04. 03:07
rds0x86_​644 x 21,80031,99215.04. 03:08
rds1x86_​644 x 11,60012,74815.04. 03:09
rds2x86_​644 x 11,60012,74815.04. 03:09
rds3x86_​644 x 11,60012,74815.04. 03:10
rds4x86_​644 x 11,60012,74815.04. 03:11
rds5x86_​644 x 11,60012,74815.04. 03:11
rds6x86_​644 x 11,60012,74815.04. 03:12
rds7x86_​644 x 11,60012,74815.04. 03:12
rds8x86_​644 x 11,60012,74815.04. 03:12
res0x86_​644 x 23,40054,39215.04. 03:13
res1x86_​644 x 11,60014,40015.04. 03:14
res1sx86_​644 x 11,60014,40015.04. 03:14
res2x86_​644 x 11,60014,40015.04. 03:15
res3x86_​644 x 12,00015,97215.04. 03:15
res3saarch​640 x 1 x 11,0001,60015.04. 03:16
res4x86_​644 x 11,90015,05215.04. 03:17
res4sx86_​644 x 11,90015,05215.04. 03:17
res5x86_​642 x 22,20019,20015.04. 03:17
res5sx86_​642 x 22,20019,20015.04. 03:18
res6x86_​644 x 11,1008,75215.04. 03:19
res6saarch​644 x 101,60015.04. 03:19
res7arm​v7l0 x 1 x 11,0001215.04. 03:20
res7sarm​v7l0 x 1 x 11,0001215.04. 03:21
res8x86_​644 x 11,90015,05215.04. 03:22
res8sx86_​644 x 11,90015,05215.04. 03:22
rfs0x86_​6416 x 22,000128,00015.04. 03:23
rfs1aarch​644 x 11,50043215.04. 03:23
rfs1saarch​644 x 11,50043215.04. 03:24
rfs2x86_​644 x 13,00024,00015.04. 03:24
rfs2sx86_​642 x 13,00011,99815.04. 03:24
rfs3x86_​644 x 11,60012,74815.04. 03:25
rfs3sx86_​644 x 11,60012,74815.04. 03:25
rfs4aarch​641 x 11,4001,60015.04. 03:26
rfs4sarm​v7l1 x 180080015.04. 03:27
rfs5aarch​644 x 11,2006415.04. 03:28
rfs5saarch​644 x 11,2006415.04. 03:29
rfs6arm​v7l1 x 16671,33215.04. 03:30
rfs6sarm​v7l1 x 16671,33215.04. 03:30
rfs7x86_​644 x 22,60041,60015.04. 03:31
rfs7sx86_​644 x 17006,44815.04. 03:31
rfs8arm​v7l1 x 11,00012015.04. 03:32
 

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